E4                 48 arch/powerpc/kernel/align.c 	{ 8, LD+E4 },		/* 0 00 01: evldw[x] */
E4                 59 arch/powerpc/kernel/align.c 	{ 4, LD+E4 },		/* 0 11 00: evlwwsplat[x] */
E4                 65 arch/powerpc/kernel/align.c 	{ 8, ST+E4 },		/* 1 00 01: evstdw[x] */
E4                 76 arch/powerpc/kernel/align.c 	{ 4, ST+E4 },		/* 1 11 00: evstwwe[x] */
E4                 78 arch/powerpc/kernel/align.c 	{ 4, ST+E4 },		/* 1 11 10: evstwwo[x] */
E4                235 arch/powerpc/kernel/align.c 		case E4:
E4               2312 drivers/media/tuners/mxl5005s.c 	u32 divider_val, E3, E4, E5, E5A;
E4               2628 drivers/media/tuners/mxl5005s.c 	E4 = (state->RF_LO*divider_val/1000)/(2*state->Fxtal*Kdbl_RF/1000);
E4               2629 drivers/media/tuners/mxl5005s.c 	MXL_ControlWrite(fe, CHCAL_INT_MOD_RF, E4);
E4               2633 drivers/media/tuners/mxl5005s.c 		(E4*(2*state->Fxtal*Kdbl_RF)/10000))) /
E4                505 drivers/net/ethernet/qlogic/qed/qed_init_fw_funcs.c 				  E4,
E4               1382 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c SIG_EXPR_LIST_DECL_SESG(E4, RGMII2TXD2, RGMII2, SIG_DESC_SET(SCU400, 16),
E4               1384 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c PIN_DECL_1(E4, GPIO18C0, RGMII2TXD2);
E4               1431 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
E4               1718 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c 	ASPEED_PINCTRL_PIN(E4),