E3                142 arch/m68k/fpsp040/fpsp.h 	.set	CMDREG3B,LV-48		| cmd reg for E3 exceptions (2 bytes)
E3                189 arch/m68k/fpsp040/fpsp.h 	.set	E_BYTE,LV-28		| holds E1 and E3 bits (1 byte)
E3                191 arch/m68k/fpsp040/fpsp.h 	.set	E3,1		| which bit is E3 flag
E3                818 drivers/gpu/drm/amd/display/modules/color/color_gamma.c 	struct fixed31_32 E3;
E3                882 drivers/gpu/drm/amd/display/modules/color/color_gamma.c 	E3 =  dc_fixpt_add(E2, dc_fixpt_mul(min_lum_pq, temp2));
E3                883 drivers/gpu/drm/amd/display/modules/color/color_gamma.c 	compute_de_pq(E3, out_x);
E3               2312 drivers/media/tuners/mxl5005s.c 	u32 divider_val, E3, E4, E5, E5A;
E3               2624 drivers/media/tuners/mxl5005s.c 	E3 = (((Fmax-state->RF_LO)/1000)*32)/((Fmax-Fmin)/1000) + 8 ;
E3               2625 drivers/media/tuners/mxl5005s.c 	status += MXL_ControlWrite(fe, RFSYN_VCO_BIAS, E3);
E3                642 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c SIG_EXPR_LIST_DECL_SINGLE(E3, SCL5, I2C5, I2C5_DESC);
E3                643 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c PIN_DECL_1(E3, GPIOK0, SCL5);
E3                649 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c FUNC_GROUP_DECL(I2C5, E3, D2);
E3               2015 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c 	ASPEED_PINCTRL_PIN(E3),
E3               1346 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(E3, GPIOW5, GPIOW5, SIG_DESC_SET(SCUA0, 29));
E3               1347 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c SIG_EXPR_LIST_DECL_SINGLE(E3, ADC5, ADC5);
E3               1348 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c PIN_DECL_(E3, SIG_EXPR_LIST_PTR(E3, GPIOW5), SIG_EXPR_LIST_PTR(E3, ADC5));
E3               1349 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c FUNC_GROUP_DECL(ADC5, E3);
E3               2008 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	ASPEED_PINCTRL_PIN(E3),
E3               2575 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	{ PIN_CONFIG_BIAS_PULL_DOWN, { E3, E3 }, SCUA8, 9 },
E3               2576 drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c 	{ PIN_CONFIG_BIAS_DISABLE,   { E3, E3 }, SCUA8, 9 },
E3               1399 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c SIG_EXPR_LIST_DECL_SESG(E3, RGMII2RXCTL, RGMII2, SIG_DESC_SET(SCU400, 19),
E3               1401 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c PIN_DECL_1(E3, GPIO18C3, RGMII2RXCTL);
E3               1431 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1);
E3               1717 drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c 	ASPEED_PINCTRL_PIN(E3),
E3               1209 drivers/pinctrl/pinctrl-pic32.c 	PIC32_PINCTRL_GROUP(67, E3,
E3                273 lib/locking-selftest.c static void name##_123(void) { E1(); E2(); E3(); }	\
E3                274 lib/locking-selftest.c static void name##_132(void) { E1(); E3(); E2(); }	\
E3                275 lib/locking-selftest.c static void name##_213(void) { E2(); E1(); E3(); }	\
E3                276 lib/locking-selftest.c static void name##_231(void) { E2(); E3(); E1(); }	\
E3                277 lib/locking-selftest.c static void name##_312(void) { E3(); E1(); E2(); }	\
E3                278 lib/locking-selftest.c static void name##_321(void) { E3(); E2(); E1(); }
E3                881 lib/locking-selftest.c #undef E3
E3                929 lib/locking-selftest.c #undef E3
E3                991 lib/locking-selftest.c #undef E3
E3               1029 lib/locking-selftest.c #undef E3