D_BDW_PLUS 2030 drivers/gpu/drm/i915/gvt/cmd_parser.c F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_BDW_PLUS, 0, 8, D_BDW_PLUS 2034 drivers/gpu/drm/i915/gvt/cmd_parser.c F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_BDW_PLUS, ADDR_FIX_1(2), D_BDW_PLUS 2037 drivers/gpu/drm/i915/gvt/cmd_parser.c {"MI_STORE_DATA_IMM", OP_MI_STORE_DATA_IMM, F_LEN_VAR, R_ALL, D_BDW_PLUS, D_BDW_PLUS 2046 drivers/gpu/drm/i915/gvt/cmd_parser.c {"MI_UPDATE_GTT", OP_MI_UPDATE_GTT, F_LEN_VAR, R_ALL, D_BDW_PLUS, 0, 10, D_BDW_PLUS 2081 drivers/gpu/drm/i915/gvt/cmd_parser.c {"MI_OP_2E", OP_MI_2E, F_LEN_VAR | F_LEN_VAR_FIXED, R_ALL, D_BDW_PLUS, D_BDW_PLUS 2084 drivers/gpu/drm/i915/gvt/cmd_parser.c {"MI_OP_2F", OP_MI_2F, F_LEN_VAR, R_ALL, D_BDW_PLUS, ADDR_FIX_1(1), D_BDW_PLUS 2299 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2301 drivers/gpu/drm/i915/gvt/cmd_parser.c {"3DSTATE_VF_SGVS", OP_3DSTATE_VF_SGVS, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, 8, D_BDW_PLUS 2305 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2308 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2310 drivers/gpu/drm/i915/gvt/cmd_parser.c {"3DSTATE_PS_BLEND", OP_3DSTATE_PS_BLEND, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, D_BDW_PLUS 2314 drivers/gpu/drm/i915/gvt/cmd_parser.c R_RCS, D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2316 drivers/gpu/drm/i915/gvt/cmd_parser.c {"3DSTATE_PS_EXTRA", OP_3DSTATE_PS_EXTRA, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, D_BDW_PLUS 2319 drivers/gpu/drm/i915/gvt/cmd_parser.c {"3DSTATE_RASTER", OP_3DSTATE_RASTER, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, 8, D_BDW_PLUS 2322 drivers/gpu/drm/i915/gvt/cmd_parser.c {"3DSTATE_SBE_SWIZ", OP_3DSTATE_SBE_SWIZ, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, 8, D_BDW_PLUS 2325 drivers/gpu/drm/i915/gvt/cmd_parser.c {"3DSTATE_WM_HZ_OP", OP_3DSTATE_WM_HZ_OP, F_LEN_VAR, R_RCS, D_BDW_PLUS, 0, 8, D_BDW_PLUS 2329 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2335 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, ADDR_FIX_1(2), 8, NULL}, D_BDW_PLUS 2355 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2358 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2364 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2367 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2413 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2445 drivers/gpu/drm/i915/gvt/cmd_parser.c {"3DSTATE_SO_BUFFER", OP_3DSTATE_SO_BUFFER, F_LEN_VAR, R_RCS, D_BDW_PLUS, D_BDW_PLUS 2450 drivers/gpu/drm/i915/gvt/cmd_parser.c F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL}, D_BDW_PLUS 2453 drivers/gpu/drm/i915/gvt/cmd_parser.c F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL}, D_BDW_PLUS 2457 drivers/gpu/drm/i915/gvt/cmd_parser.c F_LEN_VAR, R_RCS, D_BDW_PLUS, ADDR_FIX_1(1), 8, NULL}, D_BDW_PLUS 2460 drivers/gpu/drm/i915/gvt/cmd_parser.c D_BDW_PLUS, 0, 8, NULL}, D_BDW_PLUS 2475 drivers/gpu/drm/i915/gvt/cmd_parser.c {"STATE_BASE_ADDRESS", OP_STATE_BASE_ADDRESS, F_LEN_VAR, R_RCS, D_BDW_PLUS, D_BDW_PLUS 2485 drivers/gpu/drm/i915/gvt/cmd_parser.c {"3DSTATE_CONSTANT_VS", OP_3DSTATE_CONSTANT_VS, F_LEN_VAR, R_RCS, D_BDW_PLUS, D_BDW_PLUS 2530 drivers/gpu/drm/i915/gvt/cmd_parser.c R_VCS, D_BDW_PLUS, 0, 12, NULL}, D_BDW_PLUS 2533 drivers/gpu/drm/i915/gvt/cmd_parser.c F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL}, D_BDW_PLUS 2536 drivers/gpu/drm/i915/gvt/cmd_parser.c F_LEN_VAR, R_VCS, D_BDW_PLUS, ADDR_FIX_3(1, 3, 5), 12, NULL}, D_BDW_PLUS 2538 drivers/gpu/drm/i915/gvt/cmd_parser.c {"OP_2_0_0_5", OP_2_0_0_5, F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL}, D_BDW_PLUS 2644 drivers/gpu/drm/i915/gvt/cmd_parser.c {"VEB_DI_IECP", OP_VEB_DNDI_IECP_STATE, F_LEN_VAR, R_VECS, D_BDW_PLUS, D_BDW_PLUS 1874 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GAMW_ECO_DEV_RW_IA, D_BDW_PLUS, NULL, D_BDW_PLUS 1892 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN7_SC_INSTDONE, D_BDW_PLUS, mmio_read_from_hw, NULL); D_BDW_PLUS 2622 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x215c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2628 drivers/gpu/drm/i915/gvt/handlers.c MMIO_F(_MMIO(0x2290), 8, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, NULL, NULL); D_BDW_PLUS 2629 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x2b00), D_BDW_PLUS); D_BDW_PLUS 2630 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x2360), D_BDW_PLUS); D_BDW_PLUS 2635 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x1c17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2636 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x1c178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2650 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(0x4260), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); D_BDW_PLUS 2651 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(0x4264), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); D_BDW_PLUS 2652 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(0x4268), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); D_BDW_PLUS 2653 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(0x426c), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); D_BDW_PLUS 2654 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(_MMIO(0x4270), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); D_BDW_PLUS 2655 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x4094), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2664 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x22178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2665 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x1a178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2666 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x1a17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2667 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x2217c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2669 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(EDP_PSR_IMR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write); D_BDW_PLUS 2670 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(EDP_PSR_IIR, D_BDW_PLUS, NULL, edp_psr_imr_iir_write); D_BDW_PLUS 2679 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IMR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); D_BDW_PLUS 2680 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IER(0), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); D_BDW_PLUS 2681 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IIR(0), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); D_BDW_PLUS 2682 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_GT_ISR(0), D_BDW_PLUS); D_BDW_PLUS 2684 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IMR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); D_BDW_PLUS 2685 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IER(1), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); D_BDW_PLUS 2686 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IIR(1), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); D_BDW_PLUS 2687 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_GT_ISR(1), D_BDW_PLUS); D_BDW_PLUS 2689 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IMR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); D_BDW_PLUS 2690 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IER(2), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); D_BDW_PLUS 2691 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IIR(2), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); D_BDW_PLUS 2692 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_GT_ISR(2), D_BDW_PLUS); D_BDW_PLUS 2694 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IMR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); D_BDW_PLUS 2695 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IER(3), D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); D_BDW_PLUS 2696 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_GT_IIR(3), D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); D_BDW_PLUS 2697 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_GT_ISR(3), D_BDW_PLUS); D_BDW_PLUS 2699 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_A), D_BDW_PLUS, NULL, D_BDW_PLUS 2701 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IER(PIPE_A), D_BDW_PLUS, NULL, D_BDW_PLUS 2703 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_A), D_BDW_PLUS, NULL, D_BDW_PLUS 2705 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_DE_PIPE_ISR(PIPE_A), D_BDW_PLUS); D_BDW_PLUS 2707 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_B), D_BDW_PLUS, NULL, D_BDW_PLUS 2709 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IER(PIPE_B), D_BDW_PLUS, NULL, D_BDW_PLUS 2711 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_B), D_BDW_PLUS, NULL, D_BDW_PLUS 2713 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_DE_PIPE_ISR(PIPE_B), D_BDW_PLUS); D_BDW_PLUS 2715 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IMR(PIPE_C), D_BDW_PLUS, NULL, D_BDW_PLUS 2717 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IER(PIPE_C), D_BDW_PLUS, NULL, D_BDW_PLUS 2719 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PIPE_IIR(PIPE_C), D_BDW_PLUS, NULL, D_BDW_PLUS 2721 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_DE_PIPE_ISR(PIPE_C), D_BDW_PLUS); D_BDW_PLUS 2723 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PORT_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); D_BDW_PLUS 2724 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PORT_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); D_BDW_PLUS 2725 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_PORT_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); D_BDW_PLUS 2726 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_DE_PORT_ISR, D_BDW_PLUS); D_BDW_PLUS 2728 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_MISC_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); D_BDW_PLUS 2729 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_MISC_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); D_BDW_PLUS 2730 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_DE_MISC_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); D_BDW_PLUS 2731 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_DE_MISC_ISR, D_BDW_PLUS); D_BDW_PLUS 2733 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_PCU_IMR, D_BDW_PLUS, NULL, intel_vgpu_reg_imr_handler); D_BDW_PLUS 2734 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_PCU_IER, D_BDW_PLUS, NULL, intel_vgpu_reg_ier_handler); D_BDW_PLUS 2735 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_PCU_IIR, D_BDW_PLUS, NULL, intel_vgpu_reg_iir_handler); D_BDW_PLUS 2736 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_PCU_ISR, D_BDW_PLUS); D_BDW_PLUS 2738 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN8_MASTER_IRQ, D_BDW_PLUS, NULL, D_BDW_PLUS 2741 drivers/gpu/drm/i915/gvt/handlers.c MMIO_RING_DFH(RING_ACTHD_UDW, D_BDW_PLUS, F_CMD_ACCESS, D_BDW_PLUS 2746 drivers/gpu/drm/i915/gvt/handlers.c ~_MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET), D_BDW_PLUS, NULL, D_BDW_PLUS 2751 drivers/gpu/drm/i915/gvt/handlers.c MMIO_RING_DFH(RING_REG, D_BDW_PLUS, 0, NULL, elsp_mmio_write); D_BDW_PLUS 2755 drivers/gpu/drm/i915/gvt/handlers.c MMIO_RING_F(RING_REG, 8, F_RO | F_CMD_ACCESS, 0, ~0, D_BDW_PLUS, D_BDW_PLUS 2760 drivers/gpu/drm/i915/gvt/handlers.c MMIO_RING_DFH(RING_REG, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2764 drivers/gpu/drm/i915/gvt/handlers.c MMIO_RING_F(RING_REG, 48, F_RO, 0, ~0, D_BDW_PLUS, NULL, NULL); D_BDW_PLUS 2768 drivers/gpu/drm/i915/gvt/handlers.c MMIO_RING_DFH(RING_REG, D_BDW_PLUS, F_MODE_MASK, NULL, NULL); D_BDW_PLUS 2771 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPEMISC(PIPE_A), D_BDW_PLUS); D_BDW_PLUS 2772 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPEMISC(PIPE_B), D_BDW_PLUS); D_BDW_PLUS 2773 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(PIPEMISC(PIPE_C), D_BDW_PLUS); D_BDW_PLUS 2774 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x1c1d0), D_BDW_PLUS); D_BDW_PLUS 2775 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN6_MBCUNIT_SNPCR, D_BDW_PLUS); D_BDW_PLUS 2776 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN7_MISCCPCTL, D_BDW_PLUS); D_BDW_PLUS 2777 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x1c054), D_BDW_PLUS); D_BDW_PLUS 2779 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(GEN6_PCODE_MAILBOX, D_BDW_PLUS, NULL, mailbox_write); D_BDW_PLUS 2781 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_PRIVATE_PAT_LO, D_BDW_PLUS); D_BDW_PLUS 2782 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_PRIVATE_PAT_HI, D_BDW_PLUS); D_BDW_PLUS 2784 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GAMTARBMODE, D_BDW_PLUS); D_BDW_PLUS 2787 drivers/gpu/drm/i915/gvt/handlers.c MMIO_RING_F(RING_REG, 32, 0, 0, 0, D_BDW_PLUS, NULL, NULL); D_BDW_PLUS 2790 drivers/gpu/drm/i915/gvt/handlers.c MMIO_RING_GM_RDR(RING_HWS_PGA, D_BDW_PLUS, NULL, hws_pga_write); D_BDW_PLUS 2792 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(HDC_CHICKEN0, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2794 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(CHICKEN_PIPESL_1(PIPE_A), D_BDW_PLUS); D_BDW_PLUS 2795 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(CHICKEN_PIPESL_1(PIPE_B), D_BDW_PLUS); D_BDW_PLUS 2796 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(CHICKEN_PIPESL_1(PIPE_C), D_BDW_PLUS); D_BDW_PLUS 2801 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x6671c), D_BDW_PLUS); D_BDW_PLUS 2802 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x66c00), D_BDW_PLUS); D_BDW_PLUS 2803 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x66c04), D_BDW_PLUS); D_BDW_PLUS 2805 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(HSW_GTT_CACHE_EN, D_BDW_PLUS); D_BDW_PLUS 2807 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_EU_DISABLE0, D_BDW_PLUS); D_BDW_PLUS 2808 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_EU_DISABLE1, D_BDW_PLUS); D_BDW_PLUS 2809 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_EU_DISABLE2, D_BDW_PLUS); D_BDW_PLUS 2811 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0xfdc), D_BDW_PLUS); D_BDW_PLUS 2812 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(GEN8_ROW_CHICKEN, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, D_BDW_PLUS 2814 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(GEN7_ROW_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, D_BDW_PLUS 2816 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(GEN8_UCGCTL6, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2820 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(GEN8_L3SQCREG4, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2825 drivers/gpu/drm/i915/gvt/handlers.c MMIO_F(_MMIO(0x24d0), 48, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, D_BDW_PLUS 2828 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x44484), D_BDW_PLUS); D_BDW_PLUS 2829 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x4448c), D_BDW_PLUS); D_BDW_PLUS 2832 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(GEN8_L3_LRA_1_GPGPU, D_BDW_PLUS); D_BDW_PLUS 2836 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x110000), D_BDW_PLUS); D_BDW_PLUS 2838 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x48400), D_BDW_PLUS); D_BDW_PLUS 2840 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x6e570), D_BDW_PLUS); D_BDW_PLUS 2841 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(_MMIO(0x65f10), D_BDW_PLUS); D_BDW_PLUS 2843 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe194), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2844 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe188), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2845 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(HALF_SLICE_CHICKEN2, D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2846 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x2580), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2850 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe220), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2851 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe230), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2852 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe240), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2853 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe260), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2854 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe270), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2855 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe280), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2856 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe2a0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2857 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe2b0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2858 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0xe2c0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); D_BDW_PLUS 2859 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DFH(_MMIO(0x21f0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL);