D_BDW              53 drivers/gpu/drm/i915/gvt/handlers.c 		return D_BDW;
D_BDW            2492 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(FORCEWAKE_ACK_HSW, D_BDW, NULL, NULL);
D_BDW            2524 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(HSW_PWR_WELL_CTL1, D_BDW, NULL, power_well_ctl_mmio_write);
D_BDW            2525 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(HSW_PWR_WELL_CTL2, D_BDW, NULL, power_well_ctl_mmio_write);
D_BDW            2526 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(HSW_PWR_WELL_CTL3, D_BDW, NULL, power_well_ctl_mmio_write);
D_BDW            2527 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(HSW_PWR_WELL_CTL4, D_BDW, NULL, power_well_ctl_mmio_write);
D_BDW            2528 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(HSW_PWR_WELL_CTL5, D_BDW, NULL, power_well_ctl_mmio_write);
D_BDW            2529 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DH(HSW_PWR_WELL_CTL6, D_BDW, NULL, power_well_ctl_mmio_write);
D_BDW            2798 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(WM_MISC, D_BDW);
D_BDW            2799 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(_MMIO(BDW_EDP_PSR_BASE), D_BDW);
D_BDW            2818 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DFH(_MMIO(0xb1f0), D_BDW, F_CMD_ACCESS, NULL, NULL);
D_BDW            2819 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DFH(_MMIO(0xb1c0), D_BDW, F_CMD_ACCESS, NULL, NULL);
D_BDW            2821 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DFH(_MMIO(0xb100), D_BDW, F_CMD_ACCESS, NULL, NULL);
D_BDW            2822 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DFH(_MMIO(0xb10c), D_BDW, F_CMD_ACCESS, NULL, NULL);
D_BDW            2823 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_D(_MMIO(0xb110), D_BDW);
D_BDW            2831 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DFH(_MMIO(0x83a4), D_BDW, F_CMD_ACCESS, NULL, NULL);
D_BDW            2834 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DFH(_MMIO(0x8430), D_BDW, F_CMD_ACCESS, NULL, NULL);
D_BDW            2848 drivers/gpu/drm/i915/gvt/handlers.c 	MMIO_DFH(_MMIO(0x2248), D_BDW, F_CMD_ACCESS, NULL, NULL);
D_BDW              49 drivers/gpu/drm/i915/gvt/mmio.h #define D_GEN8PLUS	(D_BDW | D_SKL | D_KBL | D_BXT | D_CFL)
D_BDW              52 drivers/gpu/drm/i915/gvt/mmio.h #define D_BDW_PLUS	(D_BDW | D_SKL | D_KBL | D_BXT | D_CFL)
D_BDW              54 drivers/gpu/drm/i915/gvt/mmio.h #define D_PRE_SKL	(D_BDW)
D_BDW              55 drivers/gpu/drm/i915/gvt/mmio.h #define D_ALL		(D_BDW | D_SKL | D_KBL | D_BXT | D_CFL)