DSPCNTR 3833 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE_FW(DSPCNTR(i9xx_plane), dspcntr); DSPCNTR 3868 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE_FW(DSPCNTR(i9xx_plane), dspcntr); DSPCNTR 3897 drivers/gpu/drm/i915/display/intel_display.c val = I915_READ(DSPCNTR(i9xx_plane)); DSPCNTR 8618 drivers/gpu/drm/i915/display/intel_display.c val = I915_READ(DSPCNTR(i9xx_plane)); DSPCNTR 8756 drivers/gpu/drm/i915/display/intel_display.c tmp = I915_READ(DSPCNTR(i9xx_plane)); DSPCNTR 16362 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(I915_READ(DSPCNTR(PLANE_A)) & DISPLAY_PLANE_ENABLE); DSPCNTR 16363 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(I915_READ(DSPCNTR(PLANE_B)) & DISPLAY_PLANE_ENABLE); DSPCNTR 16364 drivers/gpu/drm/i915/display/intel_display.c WARN_ON(I915_READ(DSPCNTR(PLANE_C)) & DISPLAY_PLANE_ENABLE); DSPCNTR 17248 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].control = I915_READ(DSPCNTR(i)); DSPCNTR 1590 drivers/gpu/drm/i915/display/vlv_dsi.c val = I915_READ(DSPCNTR(plane->i9xx_plane)); DSPCNTR 1243 drivers/gpu/drm/i915/gvt/cmd_parser.c info->ctrl_reg = DSPCNTR(info->pipe); DSPCNTR 1309 drivers/gpu/drm/i915/gvt/cmd_parser.c info->ctrl_reg = DSPCNTR(info->pipe); DSPCNTR 338 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISPLAY_PLANE_ENABLE; DSPCNTR 213 drivers/gpu/drm/i915/gvt/fb_decoder.c val = vgpu_vreg_t(vgpu, DSPCNTR(pipe)); DSPCNTR 763 drivers/gpu/drm/i915/gvt/handlers.c if (vgpu_vreg_t(vgpu, DSPCNTR(pipe)) & PLANE_CTL_ASYNC_FLIP) DSPCNTR 2009 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPCNTR(PIPE_A), D_ALL); DSPCNTR 2020 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPCNTR(PIPE_B), D_ALL); DSPCNTR 2031 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPCNTR(PIPE_C), D_ALL); DSPCNTR 8897 drivers/gpu/drm/i915/intel_pm.c I915_WRITE(DSPCNTR(pipe), DSPCNTR 8898 drivers/gpu/drm/i915/intel_pm.c I915_READ(DSPCNTR(pipe)) |