DSPADDR 3839 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE_FW(DSPADDR(i9xx_plane), DSPADDR 3872 drivers/gpu/drm/i915/display/intel_display.c I915_WRITE_FW(DSPADDR(i9xx_plane), 0); DSPADDR 8648 drivers/gpu/drm/i915/display/intel_display.c base = I915_READ(DSPADDR(i9xx_plane)); DSPADDR 17255 drivers/gpu/drm/i915/display/intel_display.c error->plane[i].addr = I915_READ(DSPADDR(i)); DSPADDR 2010 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPADDR(PIPE_A), D_ALL); DSPADDR 2021 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPADDR(PIPE_B), D_ALL); DSPADDR 2032 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(DSPADDR(PIPE_C), D_ALL); DSPADDR 6271 drivers/gpu/drm/i915/i915_reg.h #define DSPLINOFF(plane) DSPADDR(plane)