DSPABASE          533 drivers/gpu/drm/gma500/cdv_device.c 		.base = DSPABASE,
DSPABASE          535 drivers/gpu/drm/gma500/cdv_device.c 		.addr = DSPABASE,
DSPABASE          877 drivers/gpu/drm/gma500/mdfld_dsi_dpi.c 		REG_WRITE(DSPABASE, 0x00);
DSPABASE          212 drivers/gpu/drm/gma500/oaktrail_device.c 	p->addr = PSB_RVDC32(DSPABASE);
DSPABASE          267 drivers/gpu/drm/gma500/psb_device.c 		.base = DSPABASE,
DSPABASE          269 drivers/gpu/drm/gma500/psb_device.c 		.addr = DSPABASE,
DSPABASE          410 drivers/video/fbdev/intelfb/intelfbhw.c 		OUTREG(DSPABASE, offset);
DSPABASE          434 drivers/video/fbdev/intelfb/intelfbhw.c 	tmp = INREG(DSPABASE);
DSPABASE          435 drivers/video/fbdev/intelfb/intelfbhw.c 	OUTREG(DSPABASE, tmp);
DSPABASE          617 drivers/video/fbdev/intelfb/intelfbhw.c 	hw->disp_a_base = INREG(DSPABASE);
DSPABASE         1468 drivers/video/fbdev/intelfb/intelfbhw.c 	OUTREG(DSPABASE, hw->disp_a_base);
DSPABASE         1475 drivers/video/fbdev/intelfb/intelfbhw.c 		OUTREG(DSPABASE, hw->disp_a_base);
DSPABASE         2029 drivers/video/fbdev/intelfb/intelfbhw.c 		OUTREG(DSPABASE, dinfo->vsync.pan_offset);
DSPABASE         2074 drivers/video/fbdev/intelfb/intelfbhw.c 			OUTREG(DSPABASE, dinfo->vsync.pan_offset);