DSI_REG 52 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_REVISION DSI_REG(DSI_PROTO, 0x0000) DSI_REG 53 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_SYSCONFIG DSI_REG(DSI_PROTO, 0x0010) DSI_REG 54 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_SYSSTATUS DSI_REG(DSI_PROTO, 0x0014) DSI_REG 55 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_IRQSTATUS DSI_REG(DSI_PROTO, 0x0018) DSI_REG 56 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_IRQENABLE DSI_REG(DSI_PROTO, 0x001C) DSI_REG 57 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_CTRL DSI_REG(DSI_PROTO, 0x0040) DSI_REG 58 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_GNQ DSI_REG(DSI_PROTO, 0x0044) DSI_REG 59 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_COMPLEXIO_CFG1 DSI_REG(DSI_PROTO, 0x0048) DSI_REG 60 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_COMPLEXIO_IRQ_STATUS DSI_REG(DSI_PROTO, 0x004C) DSI_REG 61 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_COMPLEXIO_IRQ_ENABLE DSI_REG(DSI_PROTO, 0x0050) DSI_REG 62 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_CLK_CTRL DSI_REG(DSI_PROTO, 0x0054) DSI_REG 63 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_TIMING1 DSI_REG(DSI_PROTO, 0x0058) DSI_REG 64 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_TIMING2 DSI_REG(DSI_PROTO, 0x005C) DSI_REG 65 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VM_TIMING1 DSI_REG(DSI_PROTO, 0x0060) DSI_REG 66 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VM_TIMING2 DSI_REG(DSI_PROTO, 0x0064) DSI_REG 67 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VM_TIMING3 DSI_REG(DSI_PROTO, 0x0068) DSI_REG 68 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_CLK_TIMING DSI_REG(DSI_PROTO, 0x006C) DSI_REG 69 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_TX_FIFO_VC_SIZE DSI_REG(DSI_PROTO, 0x0070) DSI_REG 70 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_RX_FIFO_VC_SIZE DSI_REG(DSI_PROTO, 0x0074) DSI_REG 71 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_COMPLEXIO_CFG2 DSI_REG(DSI_PROTO, 0x0078) DSI_REG 72 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_RX_FIFO_VC_FULLNESS DSI_REG(DSI_PROTO, 0x007C) DSI_REG 73 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VM_TIMING4 DSI_REG(DSI_PROTO, 0x0080) DSI_REG 74 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_TX_FIFO_VC_EMPTINESS DSI_REG(DSI_PROTO, 0x0084) DSI_REG 75 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VM_TIMING5 DSI_REG(DSI_PROTO, 0x0088) DSI_REG 76 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VM_TIMING6 DSI_REG(DSI_PROTO, 0x008C) DSI_REG 77 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VM_TIMING7 DSI_REG(DSI_PROTO, 0x0090) DSI_REG 78 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_STOPCLK_TIMING DSI_REG(DSI_PROTO, 0x0094) DSI_REG 79 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VC_CTRL(n) DSI_REG(DSI_PROTO, 0x0100 + (n * 0x20)) DSI_REG 80 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VC_TE(n) DSI_REG(DSI_PROTO, 0x0104 + (n * 0x20)) DSI_REG 81 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VC_LONG_PACKET_HEADER(n) DSI_REG(DSI_PROTO, 0x0108 + (n * 0x20)) DSI_REG 82 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VC_LONG_PACKET_PAYLOAD(n) DSI_REG(DSI_PROTO, 0x010C + (n * 0x20)) DSI_REG 83 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VC_SHORT_PACKET_HEADER(n) DSI_REG(DSI_PROTO, 0x0110 + (n * 0x20)) DSI_REG 84 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VC_IRQSTATUS(n) DSI_REG(DSI_PROTO, 0x0118 + (n * 0x20)) DSI_REG 85 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_VC_IRQENABLE(n) DSI_REG(DSI_PROTO, 0x011C + (n * 0x20)) DSI_REG 93 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_DSIPHY_CFG0 DSI_REG(DSI_PHY, 0x0000) DSI_REG 94 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_DSIPHY_CFG1 DSI_REG(DSI_PHY, 0x0004) DSI_REG 95 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_DSIPHY_CFG2 DSI_REG(DSI_PHY, 0x0008) DSI_REG 96 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_DSIPHY_CFG5 DSI_REG(DSI_PHY, 0x0014) DSI_REG 97 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_DSIPHY_CFG10 DSI_REG(DSI_PHY, 0x0028) DSI_REG 105 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_PLL_CONTROL DSI_REG(DSI_PLL, 0x0000) DSI_REG 106 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_PLL_STATUS DSI_REG(DSI_PLL, 0x0004) DSI_REG 107 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_PLL_GO DSI_REG(DSI_PLL, 0x0008) DSI_REG 108 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_PLL_CONFIGURATION1 DSI_REG(DSI_PLL, 0x000C) DSI_REG 109 drivers/gpu/drm/omapdrm/dss/dsi.c #define DSI_PLL_CONFIGURATION2 DSI_REG(DSI_PLL, 0x0010) DSI_REG 51 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_REVISION DSI_REG(DSI_PROTO, 0x0000) DSI_REG 52 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_SYSCONFIG DSI_REG(DSI_PROTO, 0x0010) DSI_REG 53 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_SYSSTATUS DSI_REG(DSI_PROTO, 0x0014) DSI_REG 54 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_IRQSTATUS DSI_REG(DSI_PROTO, 0x0018) DSI_REG 55 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_IRQENABLE DSI_REG(DSI_PROTO, 0x001C) DSI_REG 56 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_CTRL DSI_REG(DSI_PROTO, 0x0040) DSI_REG 57 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_GNQ DSI_REG(DSI_PROTO, 0x0044) DSI_REG 58 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_COMPLEXIO_CFG1 DSI_REG(DSI_PROTO, 0x0048) DSI_REG 59 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_COMPLEXIO_IRQ_STATUS DSI_REG(DSI_PROTO, 0x004C) DSI_REG 60 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_COMPLEXIO_IRQ_ENABLE DSI_REG(DSI_PROTO, 0x0050) DSI_REG 61 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_CLK_CTRL DSI_REG(DSI_PROTO, 0x0054) DSI_REG 62 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_TIMING1 DSI_REG(DSI_PROTO, 0x0058) DSI_REG 63 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_TIMING2 DSI_REG(DSI_PROTO, 0x005C) DSI_REG 64 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VM_TIMING1 DSI_REG(DSI_PROTO, 0x0060) DSI_REG 65 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VM_TIMING2 DSI_REG(DSI_PROTO, 0x0064) DSI_REG 66 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VM_TIMING3 DSI_REG(DSI_PROTO, 0x0068) DSI_REG 67 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_CLK_TIMING DSI_REG(DSI_PROTO, 0x006C) DSI_REG 68 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_TX_FIFO_VC_SIZE DSI_REG(DSI_PROTO, 0x0070) DSI_REG 69 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_RX_FIFO_VC_SIZE DSI_REG(DSI_PROTO, 0x0074) DSI_REG 70 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_COMPLEXIO_CFG2 DSI_REG(DSI_PROTO, 0x0078) DSI_REG 71 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_RX_FIFO_VC_FULLNESS DSI_REG(DSI_PROTO, 0x007C) DSI_REG 72 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VM_TIMING4 DSI_REG(DSI_PROTO, 0x0080) DSI_REG 73 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_TX_FIFO_VC_EMPTINESS DSI_REG(DSI_PROTO, 0x0084) DSI_REG 74 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VM_TIMING5 DSI_REG(DSI_PROTO, 0x0088) DSI_REG 75 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VM_TIMING6 DSI_REG(DSI_PROTO, 0x008C) DSI_REG 76 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VM_TIMING7 DSI_REG(DSI_PROTO, 0x0090) DSI_REG 77 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_STOPCLK_TIMING DSI_REG(DSI_PROTO, 0x0094) DSI_REG 78 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VC_CTRL(n) DSI_REG(DSI_PROTO, 0x0100 + (n * 0x20)) DSI_REG 79 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VC_TE(n) DSI_REG(DSI_PROTO, 0x0104 + (n * 0x20)) DSI_REG 80 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VC_LONG_PACKET_HEADER(n) DSI_REG(DSI_PROTO, 0x0108 + (n * 0x20)) DSI_REG 81 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VC_LONG_PACKET_PAYLOAD(n) DSI_REG(DSI_PROTO, 0x010C + (n * 0x20)) DSI_REG 82 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VC_SHORT_PACKET_HEADER(n) DSI_REG(DSI_PROTO, 0x0110 + (n * 0x20)) DSI_REG 83 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VC_IRQSTATUS(n) DSI_REG(DSI_PROTO, 0x0118 + (n * 0x20)) DSI_REG 84 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_VC_IRQENABLE(n) DSI_REG(DSI_PROTO, 0x011C + (n * 0x20)) DSI_REG 92 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_DSIPHY_CFG0 DSI_REG(DSI_PHY, 0x0000) DSI_REG 93 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_DSIPHY_CFG1 DSI_REG(DSI_PHY, 0x0004) DSI_REG 94 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_DSIPHY_CFG2 DSI_REG(DSI_PHY, 0x0008) DSI_REG 95 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_DSIPHY_CFG5 DSI_REG(DSI_PHY, 0x0014) DSI_REG 96 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_DSIPHY_CFG10 DSI_REG(DSI_PHY, 0x0028) DSI_REG 104 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_PLL_CONTROL DSI_REG(DSI_PLL, 0x0000) DSI_REG 105 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_PLL_STATUS DSI_REG(DSI_PLL, 0x0004) DSI_REG 106 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_PLL_GO DSI_REG(DSI_PLL, 0x0008) DSI_REG 107 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_PLL_CONFIGURATION1 DSI_REG(DSI_PLL, 0x000C) DSI_REG 108 drivers/video/fbdev/omap2/omapfb/dss/dsi.c #define DSI_PLL_CONFIGURATION2 DSI_REG(DSI_PLL, 0x0010)