DSI_MAX            32 drivers/gpu/drm/msm/dsi/dsi_cfg.h 	const resource_size_t io_start[DSI_MAX];
DSI_MAX            22 drivers/gpu/drm/msm/dsi/dsi_manager.c 	struct msm_dsi *dsi[DSI_MAX];
DSI_MAX            42 drivers/gpu/drm/msm/dsi/dsi_manager.c 	return msm_dsim_glb.dsi[(id + 1) % DSI_MAX];
DSI_MAX           141 drivers/gpu/drm/msm/dsi/dsi_manager.c 		   struct msm_dsi_phy_shared_timings shared_timings[DSI_MAX])
DSI_MAX           377 drivers/gpu/drm/msm/dsi/dsi_manager.c 	struct msm_dsi_phy_shared_timings phy_shared_timings[DSI_MAX];
DSI_MAX           791 drivers/gpu/drm/msm/dsi/dsi_manager.c 	if (id >= DSI_MAX) {
DSI_MAX           375 drivers/gpu/drm/msm/dsi/phy/dsi_phy.c 	if ((phy_id >= DSI_MAX) || (pll_id >= DSI_MAX))
DSI_MAX            36 drivers/gpu/drm/msm/dsi/phy/dsi_phy.h 	bool src_pll_truthtable[DSI_MAX][DSI_MAX];
DSI_MAX            37 drivers/gpu/drm/msm/dsi/phy/dsi_phy.h 	const resource_size_t io_start[DSI_MAX];
DSI_MAX           130 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c static struct dsi_pll_10nm *pll_10nm_list[DSI_MAX];
DSI_MAX           594 drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c 		pll_10nm->slave = pll_10nm_list[(pll_10nm->id + 1) % DSI_MAX];
DSI_MAX           174 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c static struct dsi_pll_14nm *pll_14nm_list[DSI_MAX];
DSI_MAX           860 drivers/gpu/drm/msm/dsi/pll/dsi_pll_14nm.c 		pll_14nm->slave = pll_14nm_list[(pll_14nm->id + 1) % DSI_MAX];