DRA7XX_PRM_REGADDR 78 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_PRM_PROFILING_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_OCP_SOCKET_INST, 0x0040) DRA7XX_PRM_REGADDR 98 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_SYSCLK1 DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0000) DRA7XX_PRM_REGADDR 100 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_WKUPAON DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0008) DRA7XX_PRM_REGADDR 102 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ABE_PLL_REF DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x000c) DRA7XX_PRM_REGADDR 104 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_SYS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0010) DRA7XX_PRM_REGADDR 106 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ABE_PLL_BYPAS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0014) DRA7XX_PRM_REGADDR 108 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ABE_PLL_SYS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0018) DRA7XX_PRM_REGADDR 110 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ABE_24M DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x001c) DRA7XX_PRM_REGADDR 112 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ABE_SYS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0020) DRA7XX_PRM_REGADDR 114 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_HDMI_MCASP_AUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0024) DRA7XX_PRM_REGADDR 116 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_HDMI_TIMER DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0028) DRA7XX_PRM_REGADDR 118 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_MCASP_SYS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x002c) DRA7XX_PRM_REGADDR 120 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_MLBP_MCASP DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0030) DRA7XX_PRM_REGADDR 122 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_MLB_MCASP DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0034) DRA7XX_PRM_REGADDR 124 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_PER_ABE_X1_GFCLK_MCASP_AUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0038) DRA7XX_PRM_REGADDR 126 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_SYS_CLK1_32K DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0040) DRA7XX_PRM_REGADDR 128 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_TIMER_SYS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0044) DRA7XX_PRM_REGADDR 130 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_VIDEO1_MCASP_AUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0048) DRA7XX_PRM_REGADDR 132 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_VIDEO1_TIMER DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x004c) DRA7XX_PRM_REGADDR 134 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_VIDEO2_MCASP_AUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0050) DRA7XX_PRM_REGADDR 136 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_VIDEO2_TIMER DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0054) DRA7XX_PRM_REGADDR 138 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_CLKOUTMUX0 DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0058) DRA7XX_PRM_REGADDR 140 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_CLKOUTMUX1 DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x005c) DRA7XX_PRM_REGADDR 142 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_CLKOUTMUX2 DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0060) DRA7XX_PRM_REGADDR 144 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_HDMI_PLL_SYS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0064) DRA7XX_PRM_REGADDR 146 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_VIDEO1_PLL_SYS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0068) DRA7XX_PRM_REGADDR 148 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_VIDEO2_PLL_SYS DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x006c) DRA7XX_PRM_REGADDR 150 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ABE_CLK_DIV DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0070) DRA7XX_PRM_REGADDR 152 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ABE_GICLK_DIV DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0074) DRA7XX_PRM_REGADDR 154 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_AESS_FCLK_DIV DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0078) DRA7XX_PRM_REGADDR 156 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_EVE_CLK DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0080) DRA7XX_PRM_REGADDR 158 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_USB_OTG_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0084) DRA7XX_PRM_REGADDR 160 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_CORE_DPLL_OUT_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0088) DRA7XX_PRM_REGADDR 162 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_DSP_GFCLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x008c) DRA7XX_PRM_REGADDR 164 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_EMIF_PHY_GCLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0090) DRA7XX_PRM_REGADDR 166 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_EMU_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0094) DRA7XX_PRM_REGADDR 168 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_FUNC_96M_AON_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x0098) DRA7XX_PRM_REGADDR 170 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_GMAC_250M_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x009c) DRA7XX_PRM_REGADDR 172 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_GPU_GCLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00a0) DRA7XX_PRM_REGADDR 174 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_HDMI_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00a4) DRA7XX_PRM_REGADDR 176 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_IVA_GCLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00a8) DRA7XX_PRM_REGADDR 178 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_L3INIT_480M_GFCLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00ac) DRA7XX_PRM_REGADDR 180 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_MPU_GCLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00b0) DRA7XX_PRM_REGADDR 182 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_PCIE1_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00b4) DRA7XX_PRM_REGADDR 184 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_PCIE2_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00b8) DRA7XX_PRM_REGADDR 186 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_PER_ABE_X1_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00bc) DRA7XX_PRM_REGADDR 188 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_SATA_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00c0) DRA7XX_PRM_REGADDR 190 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_SECURE_32K_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00c4) DRA7XX_PRM_REGADDR 192 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_SYS_CLK1_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00c8) DRA7XX_PRM_REGADDR 194 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_SYS_CLK2_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00cc) DRA7XX_PRM_REGADDR 196 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_VIDEO1_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00d0) DRA7XX_PRM_REGADDR 198 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_VIDEO2_CLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00d4) DRA7XX_PRM_REGADDR 200 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ABE_LP_CLK DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00d8) DRA7XX_PRM_REGADDR 202 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_ADC_GFCLK DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00dc) DRA7XX_PRM_REGADDR 204 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_CLKSEL_EVE_GFCLK_CLKOUTMUX DRA7XX_PRM_REGADDR(DRA7XX_PRM_CKGEN_INST, 0x00e0) DRA7XX_PRM_REGADDR 532 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_L4_WKUP_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0020) DRA7XX_PRM_REGADDR 534 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_WD_TIMER1_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0028) DRA7XX_PRM_REGADDR 536 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_WD_TIMER2_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0030) DRA7XX_PRM_REGADDR 538 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_GPIO1_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0038) DRA7XX_PRM_REGADDR 540 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_TIMER1_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0040) DRA7XX_PRM_REGADDR 542 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_TIMER12_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0048) DRA7XX_PRM_REGADDR 544 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_COUNTER_32K_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0050) DRA7XX_PRM_REGADDR 546 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_SAR_RAM_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0060) DRA7XX_PRM_REGADDR 548 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_KBD_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0078) DRA7XX_PRM_REGADDR 550 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_UART10_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0080) DRA7XX_PRM_REGADDR 552 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_DCAN1_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0088) DRA7XX_PRM_REGADDR 554 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_SCRM_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0090) DRA7XX_PRM_REGADDR 556 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_IO_SRCOMP_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x0098) DRA7XX_PRM_REGADDR 558 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_ADC_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x00a0) DRA7XX_PRM_REGADDR 560 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_SPARE_SAFETY1_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x00b0) DRA7XX_PRM_REGADDR 562 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_SPARE_SAFETY2_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x00b8) DRA7XX_PRM_REGADDR 564 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_SPARE_SAFETY3_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x00c0) DRA7XX_PRM_REGADDR 566 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_SPARE_SAFETY4_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x00c8) DRA7XX_PRM_REGADDR 568 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_SPARE_UNKNOWN2_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x00d0) DRA7XX_PRM_REGADDR 570 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_WKUPAON_SPARE_UNKNOWN3_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_WKUPAON_CM_INST, 0x00d8) DRA7XX_PRM_REGADDR 580 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_EMU_DEBUGSS_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_EMU_CM_INST, 0x0004) DRA7XX_PRM_REGADDR 583 arch/arm/mach-omap2/prm7xx.h #define DRA7XX_CM_EMU_MPU_EMU_DBG_CLKCTRL DRA7XX_PRM_REGADDR(DRA7XX_PRM_EMU_CM_INST, 0x000c)