DRA7XX_CM_CORE_CAM_INST  604 arch/arm/mach-omap2/clockdomains7xx_data.c 	.cm_inst	  = DRA7XX_CM_CORE_CAM_INST,
DRA7XX_CM_CORE_CAM_INST  303 arch/arm/mach-omap2/cm2_7xx.h #define DRA7XX_CM_CAM_VIP1_CLKCTRL				DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CAM_INST, 0x0020)
DRA7XX_CM_CORE_CAM_INST  305 arch/arm/mach-omap2/cm2_7xx.h #define DRA7XX_CM_CAM_VIP2_CLKCTRL				DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CAM_INST, 0x0028)
DRA7XX_CM_CORE_CAM_INST  307 arch/arm/mach-omap2/cm2_7xx.h #define DRA7XX_CM_CAM_VIP3_CLKCTRL				DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CAM_INST, 0x0030)
DRA7XX_CM_CORE_CAM_INST  309 arch/arm/mach-omap2/cm2_7xx.h #define DRA7XX_CM_CAM_LVDSRX_CLKCTRL				DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CAM_INST, 0x0038)
DRA7XX_CM_CORE_CAM_INST  311 arch/arm/mach-omap2/cm2_7xx.h #define DRA7XX_CM_CAM_CSI1_CLKCTRL				DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CAM_INST, 0x0040)
DRA7XX_CM_CORE_CAM_INST  313 arch/arm/mach-omap2/cm2_7xx.h #define DRA7XX_CM_CAM_CSI2_CLKCTRL				DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CAM_INST, 0x0048)