DP_VID_M_N_GEN_EN  993 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_VID_TIMING, DP_VID_M_N_GEN_EN, 0);
DP_VID_M_N_GEN_EN 1003 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c 		REG_UPDATE(DP_VID_TIMING, DP_VID_M_N_GEN_EN, 1);
DP_VID_M_N_GEN_EN  165 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP_VID_TIMING, DP_VID_M_N_GEN_EN, mask_sh),\
DP_VID_M_N_GEN_EN  247 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	SE_SF(DP0_DP_VID_TIMING, DP_VID_M_N_GEN_EN, mask_sh),\
DP_VID_M_N_GEN_EN  443 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint8_t DP_VID_M_N_GEN_EN;
DP_VID_M_N_GEN_EN  574 drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.h 	uint32_t DP_VID_M_N_GEN_EN;
DP_VID_M_N_GEN_EN  958 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 		REG_UPDATE(DP_VID_TIMING, DP_VID_M_N_GEN_EN, 0);
DP_VID_M_N_GEN_EN  969 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c 				DP_VID_M_N_GEN_EN, 1,
DP_VID_M_N_GEN_EN  219 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	SE_SF(DP0_DP_VID_TIMING, DP_VID_M_N_GEN_EN, mask_sh),\
DP_VID_M_N_GEN_EN  409 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.h 	type DP_VID_M_N_GEN_EN;\
DP_VID_M_N_GEN_EN  480 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 		REG_UPDATE(DP_VID_TIMING, DP_VID_M_N_GEN_EN, 0);
DP_VID_M_N_GEN_EN  491 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_stream_encoder.c 				DP_VID_M_N_GEN_EN, 1,