DP_MAX_LANE_COUNT 735 drivers/gpu/drm/amd/amdgpu/atombios_dp.c if (drm_dp_dpcd_readb(&amdgpu_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp) DP_MAX_LANE_COUNT 2818 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c if (dpcd_data[DP_MAX_LANE_COUNT - DP_DPCD_REV] == 0) DP_MAX_LANE_COUNT 2837 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c DP_MAX_LANE_COUNT - DP_DPCD_REV]; DP_MAX_LANE_COUNT 194 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c ret = drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); DP_MAX_LANE_COUNT 635 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c drm_dp_dpcd_readb(&dp->aux, DP_MAX_LANE_COUNT, &data); DP_MAX_LANE_COUNT 330 drivers/gpu/drm/gma500/cdv_intel_dp.c max_lane_count = intel_dp->dpcd[DP_MAX_LANE_COUNT] & 0x1f; DP_MAX_LANE_COUNT 1080 drivers/gpu/drm/gma500/cdv_intel_dp.c (intel_dp->dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP)) { DP_MAX_LANE_COUNT 834 drivers/gpu/drm/radeon/atombios_dp.c if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp) DP_MAX_LANE_COUNT 1136 include/drm/drm_dp_helper.h return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; DP_MAX_LANE_COUNT 1143 include/drm/drm_dp_helper.h (dpcd[DP_MAX_LANE_COUNT] & DP_ENHANCED_FRAME_CAP); DP_MAX_LANE_COUNT 1150 include/drm/drm_dp_helper.h dpcd[DP_MAX_LANE_COUNT] & DP_TPS3_SUPPORTED;