DP_COM_CONF        87 drivers/gpu/ipu-v3/ipu-dp.c 	reg = readl(flow->base + DP_COM_CONF);
DP_COM_CONF        92 drivers/gpu/ipu-v3/ipu-dp.c 	writel(reg, flow->base + DP_COM_CONF);
DP_COM_CONF        99 drivers/gpu/ipu-v3/ipu-dp.c 		reg = readl(flow->base + DP_COM_CONF);
DP_COM_CONF       100 drivers/gpu/ipu-v3/ipu-dp.c 		writel(reg | DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
DP_COM_CONF       102 drivers/gpu/ipu-v3/ipu-dp.c 		reg = readl(flow->base + DP_COM_CONF);
DP_COM_CONF       103 drivers/gpu/ipu-v3/ipu-dp.c 		writel(reg & ~DP_COM_CONF_GWAM, flow->base + DP_COM_CONF);
DP_COM_CONF       134 drivers/gpu/ipu-v3/ipu-dp.c 	reg = readl(flow->base + DP_COM_CONF);
DP_COM_CONF       138 drivers/gpu/ipu-v3/ipu-dp.c 		writel(reg, flow->base + DP_COM_CONF);
DP_COM_CONF       164 drivers/gpu/ipu-v3/ipu-dp.c 	writel(reg, flow->base + DP_COM_CONF);
DP_COM_CONF       238 drivers/gpu/ipu-v3/ipu-dp.c 	reg = readl(flow->base + DP_COM_CONF);
DP_COM_CONF       240 drivers/gpu/ipu-v3/ipu-dp.c 	writel(reg, flow->base + DP_COM_CONF);
DP_COM_CONF       263 drivers/gpu/ipu-v3/ipu-dp.c 	reg = readl(flow->base + DP_COM_CONF);
DP_COM_CONF       270 drivers/gpu/ipu-v3/ipu-dp.c 	writel(reg, flow->base + DP_COM_CONF);