DP_AUX_NATIVE_WRITE  146 drivers/gpu/drm/amd/amdgpu/atombios_dp.c 	case DP_AUX_NATIVE_WRITE:
DP_AUX_NATIVE_WRITE   96 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 	payload.i2c_over_aux = (msg->request & DP_AUX_NATIVE_WRITE) == 0;
DP_AUX_NATIVE_WRITE 1132 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	case DP_AUX_NATIVE_WRITE:
DP_AUX_NATIVE_WRITE 1221 drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c 	else if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_WRITE ||
DP_AUX_NATIVE_WRITE  358 drivers/gpu/drm/bridge/tc358767.c 	case DP_AUX_NATIVE_WRITE:
DP_AUX_NATIVE_WRITE  626 drivers/gpu/drm/bridge/ti-sn65dsi86.c 	case DP_AUX_NATIVE_WRITE:
DP_AUX_NATIVE_WRITE  644 drivers/gpu/drm/bridge/ti-sn65dsi86.c 	if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE) {
DP_AUX_NATIVE_WRITE  666 drivers/gpu/drm/bridge/ti-sn65dsi86.c 	if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE)
DP_AUX_NATIVE_WRITE  316 drivers/gpu/drm/drm_dp_helper.c 	ret = drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
DP_AUX_NATIVE_WRITE  318 drivers/gpu/drm/drm_dp_helper.c 	drm_dp_dump_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, ret);
DP_AUX_NATIVE_WRITE  681 drivers/gpu/drm/gma500/cdv_intel_dp.c 	msg[0] = DP_AUX_NATIVE_WRITE << 4;
DP_AUX_NATIVE_WRITE 1493 drivers/gpu/drm/i915/display/intel_dp.c 	case DP_AUX_NATIVE_WRITE:
DP_AUX_NATIVE_WRITE 5608 drivers/gpu/drm/i915/display/intel_dp.c 		.request = DP_AUX_NATIVE_WRITE,
DP_AUX_NATIVE_WRITE  380 drivers/gpu/drm/i915/display/intel_psr.c 		[0] = DP_AUX_NATIVE_WRITE << 4,
DP_AUX_NATIVE_WRITE   37 drivers/gpu/drm/msm/edp/edp_aux.c 	bool native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ);
DP_AUX_NATIVE_WRITE  116 drivers/gpu/drm/msm/edp/edp_aux.c 	bool native = msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ);
DP_AUX_NATIVE_WRITE  178 drivers/gpu/drm/radeon/atombios_dp.c 	case DP_AUX_NATIVE_WRITE:
DP_AUX_NATIVE_WRITE   75 drivers/gpu/drm/radeon/radeon_dp_auxch.c 	case DP_AUX_NATIVE_WRITE:
DP_AUX_NATIVE_WRITE  174 drivers/gpu/drm/tegra/dpaux.c 	case DP_AUX_NATIVE_WRITE: