DPU_MAX_PLANES    653 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	for (i = 0; i < DPU_MAX_PLANES; i++)
DPU_MAX_PLANES    720 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	for (i = 0; i < layout->num_planes && i < DPU_MAX_PLANES; ++i) {
DPU_MAX_PLANES    725 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	for (i = 0; i < DPU_MAX_PLANES; i++)
DPU_MAX_PLANES    880 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	uint32_t plane_addr[DPU_MAX_PLANES];
DPU_MAX_PLANES    902 drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c 	for (i = 0; i < DPU_MAX_PLANES; ++i)
DPU_MAX_PLANES     29 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h #ifndef DPU_MAX_PLANES
DPU_MAX_PLANES    354 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h 	u8 element[DPU_MAX_PLANES];
DPU_MAX_PLANES    355 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h 	u8 bits[DPU_MAX_PLANES];
DPU_MAX_PLANES    387 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h 	uint32_t plane_addr[DPU_MAX_PLANES];
DPU_MAX_PLANES    388 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h 	uint32_t plane_size[DPU_MAX_PLANES];
DPU_MAX_PLANES    389 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h 	uint32_t plane_pitch[DPU_MAX_PLANES];
DPU_MAX_PLANES    355 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 	for (color = 0; color < DPU_MAX_PLANES; color++) {
DPU_MAX_PLANES    103 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int init_phase_x[DPU_MAX_PLANES];
DPU_MAX_PLANES    104 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int phase_step_x[DPU_MAX_PLANES];
DPU_MAX_PLANES    105 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int init_phase_y[DPU_MAX_PLANES];
DPU_MAX_PLANES    106 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int phase_step_y[DPU_MAX_PLANES];
DPU_MAX_PLANES    113 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int num_ext_pxls_left[DPU_MAX_PLANES];
DPU_MAX_PLANES    114 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int num_ext_pxls_right[DPU_MAX_PLANES];
DPU_MAX_PLANES    115 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int num_ext_pxls_top[DPU_MAX_PLANES];
DPU_MAX_PLANES    116 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int num_ext_pxls_btm[DPU_MAX_PLANES];
DPU_MAX_PLANES    122 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int left_ftch[DPU_MAX_PLANES];
DPU_MAX_PLANES    123 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int right_ftch[DPU_MAX_PLANES];
DPU_MAX_PLANES    124 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int top_ftch[DPU_MAX_PLANES];
DPU_MAX_PLANES    125 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int btm_ftch[DPU_MAX_PLANES];
DPU_MAX_PLANES    131 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int left_rpt[DPU_MAX_PLANES];
DPU_MAX_PLANES    132 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int right_rpt[DPU_MAX_PLANES];
DPU_MAX_PLANES    133 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int top_rpt[DPU_MAX_PLANES];
DPU_MAX_PLANES    134 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	int btm_rpt[DPU_MAX_PLANES];
DPU_MAX_PLANES    136 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	uint32_t roi_w[DPU_MAX_PLANES];
DPU_MAX_PLANES    137 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	uint32_t roi_h[DPU_MAX_PLANES];
DPU_MAX_PLANES    143 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	enum dpu_hw_filter horz_filter[DPU_MAX_PLANES];
DPU_MAX_PLANES    144 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h 	enum dpu_hw_filter vert_filter[DPU_MAX_PLANES];
DPU_MAX_PLANES    104 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t init_phase_x[DPU_MAX_PLANES];
DPU_MAX_PLANES    105 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t phase_step_x[DPU_MAX_PLANES];
DPU_MAX_PLANES    106 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t init_phase_y[DPU_MAX_PLANES];
DPU_MAX_PLANES    107 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t phase_step_y[DPU_MAX_PLANES];
DPU_MAX_PLANES    109 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	u32 preload_x[DPU_MAX_PLANES];
DPU_MAX_PLANES    110 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	u32 preload_y[DPU_MAX_PLANES];
DPU_MAX_PLANES    111 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	u32 src_width[DPU_MAX_PLANES];
DPU_MAX_PLANES    112 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	u32 src_height[DPU_MAX_PLANES];
DPU_MAX_PLANES    160 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t num_ext_pxls_lr[DPU_MAX_PLANES];
DPU_MAX_PLANES    161 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t num_ext_pxls_tb[DPU_MAX_PLANES];
DPU_MAX_PLANES    167 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t left_ftch[DPU_MAX_PLANES];
DPU_MAX_PLANES    168 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t right_ftch[DPU_MAX_PLANES];
DPU_MAX_PLANES    169 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t top_ftch[DPU_MAX_PLANES];
DPU_MAX_PLANES    170 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t btm_ftch[DPU_MAX_PLANES];
DPU_MAX_PLANES    175 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t left_rpt[DPU_MAX_PLANES];
DPU_MAX_PLANES    176 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t right_rpt[DPU_MAX_PLANES];
DPU_MAX_PLANES    177 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t top_rpt[DPU_MAX_PLANES];
DPU_MAX_PLANES    178 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t btm_rpt[DPU_MAX_PLANES];
DPU_MAX_PLANES    264 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t init_phase_x[DPU_MAX_PLANES];
DPU_MAX_PLANES    265 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t phase_step_x[DPU_MAX_PLANES];
DPU_MAX_PLANES    266 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t init_phase_y[DPU_MAX_PLANES];
DPU_MAX_PLANES    267 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	int32_t phase_step_y[DPU_MAX_PLANES];
DPU_MAX_PLANES    269 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	uint32_t preload_x[DPU_MAX_PLANES];
DPU_MAX_PLANES    270 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	uint32_t preload_y[DPU_MAX_PLANES];
DPU_MAX_PLANES    271 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	uint32_t src_width[DPU_MAX_PLANES];
DPU_MAX_PLANES    272 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h 	uint32_t src_height[DPU_MAX_PLANES];
DPU_MAX_PLANES    473 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c 	for (i = 0; i < DPU_MAX_PLANES; i++) {