DPU_DEBUG_CMDENC 49 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(to_dpu_encoder_phys_cmd(phys_enc), "\n"); DPU_DEBUG_CMDENC 189 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, "caching mode:\n"); DPU_DEBUG_CMDENC 367 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0); DPU_DEBUG_CMDENC 371 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, "tearcheck not supported\n"); DPU_DEBUG_CMDENC 393 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, "invalid - vsync_hz %u\n", DPU_DEBUG_CMDENC 416 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, DPU_DEBUG_CMDENC 420 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, DPU_DEBUG_CMDENC 424 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, DPU_DEBUG_CMDENC 428 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, DPU_DEBUG_CMDENC 449 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, "pp %d, enabling mode:\n", DPU_DEBUG_CMDENC 500 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, "pp %d\n", phys_enc->hw_pp->idx - PINGPONG_0); DPU_DEBUG_CMDENC 616 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, "pp:%d pending_cnt %d\n", DPU_DEBUG_CMDENC 831 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c DPU_DEBUG_CMDENC(cmd_enc, "created\n");