DPSECI_MAX_QUEUE_NUM   54 drivers/crypto/caam/caamalg_qi2.h 	struct dpseci_rx_queue_attr rx_queue_attr[DPSECI_MAX_QUEUE_NUM];
DPSECI_MAX_QUEUE_NUM   55 drivers/crypto/caam/caamalg_qi2.h 	struct dpseci_tx_queue_attr tx_queue_attr[DPSECI_MAX_QUEUE_NUM];
DPSECI_MAX_QUEUE_NUM   55 drivers/crypto/caam/dpseci.h 	u8 priorities[DPSECI_MAX_QUEUE_NUM];