DPLL_SYNCLOCK_ENABLE  326 drivers/gpu/drm/gma500/cdv_device.c 	if ((temp & DPLL_SYNCLOCK_ENABLE) == 0) {
DPLL_SYNCLOCK_ENABLE  327 drivers/gpu/drm/gma500/cdv_device.c 		REG_WRITE(DPLL_A, temp | DPLL_SYNCLOCK_ENABLE);
DPLL_SYNCLOCK_ENABLE  332 drivers/gpu/drm/gma500/cdv_device.c 	if ((temp & DPLL_SYNCLOCK_ENABLE) == 0) {
DPLL_SYNCLOCK_ENABLE  333 drivers/gpu/drm/gma500/cdv_device.c 		REG_WRITE(DPLL_B, temp | DPLL_SYNCLOCK_ENABLE);
DPLL_SYNCLOCK_ENABLE  226 drivers/gpu/drm/gma500/cdv_intel_display.c 	REG_WRITE(dpll_reg, DPLL_SYNCLOCK_ENABLE | DPLL_VGA_MODE_DIS);
DPLL_SYNCLOCK_ENABLE  680 drivers/gpu/drm/gma500/cdv_intel_display.c 	dpll |= DPLL_SYNCLOCK_ENABLE;
DPLL_SYNCLOCK_ENABLE  726 drivers/gpu/drm/gma500/cdv_intel_display.c 	REG_WRITE(map->dpll, dpll | DPLL_VGA_MODE_DIS | DPLL_SYNCLOCK_ENABLE);