DPLL_DIV_CTRL     296 drivers/gpu/drm/gma500/oaktrail_hdmi.c 		REG_WRITE(DPLL_DIV_CTRL, 0x00000000);
DPLL_DIV_CTRL     313 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	REG_WRITE(DPLL_DIV_CTRL, ((clock.nf << 6) | clock.nr));
DPLL_DIV_CTRL     763 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	hdmi_dev->saveDPLL_DIV_CTRL = PSB_RVDC32(DPLL_DIV_CTRL);
DPLL_DIV_CTRL     816 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	PSB_WVDC32(hdmi_dev->saveDPLL_DIV_CTRL, DPLL_DIV_CTRL);