DPLL_CTRL         293 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	dpll = REG_READ(DPLL_CTRL);
DPLL_CTRL         295 drivers/gpu/drm/gma500/oaktrail_hdmi.c 		REG_WRITE(DPLL_CTRL, dpll | (DPLL_PWRDN | DPLL_RESET));
DPLL_CTRL         309 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	dpll = REG_READ(DPLL_CTRL);
DPLL_CTRL         312 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	REG_WRITE(DPLL_CTRL, 0x00000008);
DPLL_CTRL         315 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	REG_WRITE(DPLL_CTRL, (dpll | (clock.np << DPLL_PDIV_SHIFT) | DPLL_ENSTAT | DPLL_DITHEN));
DPLL_CTRL         420 drivers/gpu/drm/gma500/oaktrail_hdmi.c 		temp = REG_READ(DPLL_CTRL);
DPLL_CTRL         422 drivers/gpu/drm/gma500/oaktrail_hdmi.c 			REG_WRITE(DPLL_CTRL, temp | (DPLL_PWRDN | DPLL_RESET));
DPLL_CTRL         434 drivers/gpu/drm/gma500/oaktrail_hdmi.c 		temp = REG_READ(DPLL_CTRL);
DPLL_CTRL         436 drivers/gpu/drm/gma500/oaktrail_hdmi.c 			REG_WRITE(DPLL_CTRL, temp & ~(DPLL_PWRDN | DPLL_RESET));
DPLL_CTRL         762 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	hdmi_dev->saveDPLL_CTRL = PSB_RVDC32(DPLL_CTRL);
DPLL_CTRL         815 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	PSB_WVDC32(hdmi_dev->saveDPLL_CTRL, DPLL_CTRL);