DPLL_CLK_ENABLE   317 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	REG_WRITE(DPLL_CLK_ENABLE, 0x80050102);
DPLL_CLK_ENABLE   437 drivers/gpu/drm/gma500/oaktrail_hdmi.c 			temp = REG_READ(DPLL_CLK_ENABLE);
DPLL_CLK_ENABLE   438 drivers/gpu/drm/gma500/oaktrail_hdmi.c 			REG_WRITE(DPLL_CLK_ENABLE, temp | DPLL_EN_DISP | DPLL_SEL_HDMI | DPLL_EN_HDMI);
DPLL_CLK_ENABLE   439 drivers/gpu/drm/gma500/oaktrail_hdmi.c 			REG_READ(DPLL_CLK_ENABLE);
DPLL_CLK_ENABLE   766 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	hdmi_dev->saveDPLL_CLK_ENABLE = PSB_RVDC32(DPLL_CLK_ENABLE);
DPLL_CLK_ENABLE   819 drivers/gpu/drm/gma500/oaktrail_hdmi.c 	PSB_WVDC32(hdmi_dev->saveDPLL_CLK_ENABLE, DPLL_CLK_ENABLE);