DPIO_CH0 1306 drivers/gpu/drm/i915/display/intel_display_power.c phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0) | DPIO_CH0 1307 drivers/gpu/drm/i915/display/intel_display_power.c PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0) | DPIO_CH0 1308 drivers/gpu/drm/i915/display/intel_display_power.c PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1) | DPIO_CH0 1314 drivers/gpu/drm/i915/display/intel_display_power.c phy_status_mask &= ~(PHY_STATUS_CMN_LDO(DPIO_PHY1, DPIO_CH0) | DPIO_CH0 1315 drivers/gpu/drm/i915/display/intel_display_power.c PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0) | DPIO_CH0 1316 drivers/gpu/drm/i915/display/intel_display_power.c PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1)); DPIO_CH0 1322 drivers/gpu/drm/i915/display/intel_display_power.c if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0)) == 0) DPIO_CH0 1323 drivers/gpu/drm/i915/display/intel_display_power.c phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0); DPIO_CH0 1330 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY0, DPIO_CH0) | DPIO_CH0 1332 drivers/gpu/drm/i915/display/intel_display_power.c phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY0, DPIO_CH0); DPIO_CH0 1345 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY0, DPIO_CH0))) DPIO_CH0 1346 drivers/gpu/drm/i915/display/intel_display_power.c phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 0); DPIO_CH0 1348 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY0, DPIO_CH0))) DPIO_CH0 1349 drivers/gpu/drm/i915/display/intel_display_power.c phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY0, DPIO_CH0, 1); DPIO_CH0 1363 drivers/gpu/drm/i915/display/intel_display_power.c if ((phy_control & PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY1, DPIO_CH0)) == 0) DPIO_CH0 1364 drivers/gpu/drm/i915/display/intel_display_power.c phy_control |= PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY1, DPIO_CH0); DPIO_CH0 1367 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD(0xf, DPIO_PHY1, DPIO_CH0))) DPIO_CH0 1368 drivers/gpu/drm/i915/display/intel_display_power.c phy_status |= PHY_STATUS_CMN_LDO(DPIO_PHY1, DPIO_CH0); DPIO_CH0 1371 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD(0x3, DPIO_PHY1, DPIO_CH0))) DPIO_CH0 1372 drivers/gpu/drm/i915/display/intel_display_power.c phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 0); DPIO_CH0 1374 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD(0xc, DPIO_PHY1, DPIO_CH0))) DPIO_CH0 1375 drivers/gpu/drm/i915/display/intel_display_power.c phy_status |= PHY_STATUS_SPLINE_LDO(DPIO_PHY1, DPIO_CH0, 1); DPIO_CH0 1501 drivers/gpu/drm/i915/display/intel_display_power.c if (ch == DPIO_CH0) DPIO_CH0 1534 drivers/gpu/drm/i915/display/intel_display_power.c if (ch == DPIO_CH0) DPIO_CH0 4753 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY0, DPIO_CH0) | DPIO_CH0 4755 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_MODE(PHY_CH_DEEP_PSR, DPIO_PHY1, DPIO_CH0); DPIO_CH0 4773 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY0, DPIO_CH0); DPIO_CH0 4776 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY0, DPIO_CH0); DPIO_CH0 4805 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD_EN(DPIO_PHY1, DPIO_CH0); DPIO_CH0 4808 drivers/gpu/drm/i915/display/intel_display_power.c PHY_CH_POWER_DOWN_OVRD(mask, DPIO_PHY1, DPIO_CH0); DPIO_CH0 1303 drivers/gpu/drm/i915/display/intel_display_types.h return DPIO_CH0; DPIO_CH0 1331 drivers/gpu/drm/i915/display/intel_display_types.h return DPIO_CH0; DPIO_CH0 167 drivers/gpu/drm/i915/display/intel_dpio_phy.c [DPIO_CH0] = { .port = PORT_B }, DPIO_CH0 177 drivers/gpu/drm/i915/display/intel_dpio_phy.c [DPIO_CH0] = { .port = PORT_A }, DPIO_CH0 190 drivers/gpu/drm/i915/display/intel_dpio_phy.c [DPIO_CH0] = { .port = PORT_B }, DPIO_CH0 200 drivers/gpu/drm/i915/display/intel_dpio_phy.c [DPIO_CH0] = { .port = PORT_A }, DPIO_CH0 210 drivers/gpu/drm/i915/display/intel_dpio_phy.c [DPIO_CH0] = { .port = PORT_C }, DPIO_CH0 248 drivers/gpu/drm/i915/display/intel_dpio_phy.c if (port == phy_info->channel[DPIO_CH0].port) { DPIO_CH0 250 drivers/gpu/drm/i915/display/intel_dpio_phy.c *ch = DPIO_CH0; DPIO_CH0 264 drivers/gpu/drm/i915/display/intel_dpio_phy.c *ch = DPIO_CH0; DPIO_CH0 797 drivers/gpu/drm/i915/display/intel_dpio_phy.c if (ch == DPIO_CH0 && pipe == PIPE_B) DPIO_CH0 812 drivers/gpu/drm/i915/display/intel_dpio_phy.c if (ch == DPIO_CH0) DPIO_CH0 820 drivers/gpu/drm/i915/display/intel_dpio_phy.c if (ch == DPIO_CH0) DPIO_CH0 3178 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3179 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3180 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3181 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3182 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3183 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3184 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY0, DPIO_CH0), D_BXT, DPIO_CH0 3186 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3187 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3188 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY0, DPIO_CH0), D_BXT, DPIO_CH0 3190 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3191 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW4_LN0(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3192 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY0, DPIO_CH0), D_BXT); DPIO_CH0 3193 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 0), D_BXT); DPIO_CH0 3194 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 1), D_BXT); DPIO_CH0 3195 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 2), D_BXT); DPIO_CH0 3196 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY0, DPIO_CH0, 3), D_BXT); DPIO_CH0 3197 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 0), D_BXT); DPIO_CH0 3198 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 1), D_BXT); DPIO_CH0 3199 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 2), D_BXT); DPIO_CH0 3200 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 3), D_BXT); DPIO_CH0 3201 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 6), D_BXT); DPIO_CH0 3202 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 8), D_BXT); DPIO_CH0 3203 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 9), D_BXT); DPIO_CH0 3204 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY0, DPIO_CH0, 10), D_BXT); DPIO_CH0 3234 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL_EBB_0(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3235 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL_EBB_4(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3236 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PCS_DW10_LN01(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3237 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PCS_DW10_GRP(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3238 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PCS_DW12_LN01(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3239 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PCS_DW12_LN23(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3240 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(BXT_PORT_PCS_DW12_GRP(DPIO_PHY1, DPIO_CH0), D_BXT, DPIO_CH0 3242 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW2_LN0(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3243 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW2_GRP(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3244 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(BXT_PORT_TX_DW3_LN0(DPIO_PHY1, DPIO_CH0), D_BXT, DPIO_CH0 3246 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW3_GRP(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3247 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW4_LN0(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3248 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW4_GRP(DPIO_PHY1, DPIO_CH0), D_BXT); DPIO_CH0 3249 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY1, DPIO_CH0, 0), D_BXT); DPIO_CH0 3250 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY1, DPIO_CH0, 1), D_BXT); DPIO_CH0 3251 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY1, DPIO_CH0, 2), D_BXT); DPIO_CH0 3252 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_TX_DW14_LN(DPIO_PHY1, DPIO_CH0, 3), D_BXT); DPIO_CH0 3253 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 0), D_BXT); DPIO_CH0 3254 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 1), D_BXT); DPIO_CH0 3255 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 2), D_BXT); DPIO_CH0 3256 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 3), D_BXT); DPIO_CH0 3257 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 6), D_BXT); DPIO_CH0 3258 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 8), D_BXT); DPIO_CH0 3259 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 9), D_BXT); DPIO_CH0 3260 drivers/gpu/drm/i915/gvt/handlers.c MMIO_D(BXT_PORT_PLL(DPIO_PHY1, DPIO_CH0, 10), D_BXT);