DMA_STATUS_REG   1105 drivers/gpu/drm/radeon/evergreen.c 	case DMA_STATUS_REG:
DMA_STATUS_REG   3790 drivers/gpu/drm/radeon/evergreen.c 		RREG32(DMA_STATUS_REG));
DMA_STATUS_REG   3793 drivers/gpu/drm/radeon/evergreen.c 			 RREG32(DMA_STATUS_REG + 0x800));
DMA_STATUS_REG   3848 drivers/gpu/drm/radeon/evergreen.c 	tmp = RREG32(DMA_STATUS_REG);
DMA_STATUS_REG    870 drivers/gpu/drm/radeon/ni.c 	case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):
DMA_STATUS_REG    871 drivers/gpu/drm/radeon/ni.c 	case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):
DMA_STATUS_REG   1769 drivers/gpu/drm/radeon/ni.c 	tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET);
DMA_STATUS_REG   1774 drivers/gpu/drm/radeon/ni.c 	tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET);
DMA_STATUS_REG    181 drivers/gpu/drm/radeon/r600.c 	case DMA_STATUS_REG:
DMA_STATUS_REG   1584 drivers/gpu/drm/radeon/r600.c 		RREG32(DMA_STATUS_REG));
DMA_STATUS_REG   1647 drivers/gpu/drm/radeon/r600.c 	tmp = RREG32(DMA_STATUS_REG);
DMA_STATUS_REG   1322 drivers/gpu/drm/radeon/si.c 	case (DMA_STATUS_REG + DMA0_REGISTER_OFFSET):
DMA_STATUS_REG   1323 drivers/gpu/drm/radeon/si.c 	case (DMA_STATUS_REG + DMA1_REGISTER_OFFSET):
DMA_STATUS_REG   3802 drivers/gpu/drm/radeon/si.c 	tmp = RREG32(DMA_STATUS_REG + DMA0_REGISTER_OFFSET);
DMA_STATUS_REG   3807 drivers/gpu/drm/radeon/si.c 	tmp = RREG32(DMA_STATUS_REG + DMA1_REGISTER_OFFSET);