DMA_NC             87 arch/mips/alchemy/common/dma.c 	{ AU1000_UART3_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC },	/* UART3_TX */
DMA_NC             88 arch/mips/alchemy/common/dma.c 	{ AU1000_UART3_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* UART3_RX */
DMA_NC             89 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* EP0RD */
DMA_NC             90 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC }, /* EP0WR */
DMA_NC             91 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x08, DMA_DW8 | DMA_NC }, /* EP2WR */
DMA_NC             92 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x0c, DMA_DW8 | DMA_NC }, /* EP3WR */
DMA_NC             93 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x10, DMA_DW8 | DMA_NC | DMA_DR }, /* EP4RD */
DMA_NC             94 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x14, DMA_DW8 | DMA_NC | DMA_DR }, /* EP5RD */
DMA_NC             96 arch/mips/alchemy/common/dma.c 	{ AU1000_I2S_PHYS_ADDR + 0x00, DMA_DW32 | DMA_NC},	/* I2S TX */
DMA_NC             97 arch/mips/alchemy/common/dma.c 	{ AU1000_I2S_PHYS_ADDR + 0x00, DMA_DW32 | DMA_NC | DMA_DR}, /* I2S RX */
DMA_NC            266 arch/mips/include/asm/mach-au1x00/au1000_dma.h 	mode &= (DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
DMA_NC            267 arch/mips/include/asm/mach-au1x00/au1000_dma.h 	chan->mode &= ~(DMA_BE | DMA_DR | DMA_TS8 | DMA_DW_MASK | DMA_NC);
DMA_NC            207 sound/soc/au1x/dma.c 		     get_dma_mode(ctx->stream[s].dma) & ~DMA_NC);