DMA_DW8            81 arch/mips/alchemy/common/dma.c 	{ AU1000_UART0_PHYS_ADDR + 0x04, DMA_DW8 },		/* UART0_TX */
DMA_DW8            82 arch/mips/alchemy/common/dma.c 	{ AU1000_UART0_PHYS_ADDR + 0x00, DMA_DW8 | DMA_DR },	/* UART0_RX */
DMA_DW8            87 arch/mips/alchemy/common/dma.c 	{ AU1000_UART3_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC },	/* UART3_TX */
DMA_DW8            88 arch/mips/alchemy/common/dma.c 	{ AU1000_UART3_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* UART3_RX */
DMA_DW8            89 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x00, DMA_DW8 | DMA_NC | DMA_DR }, /* EP0RD */
DMA_DW8            90 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x04, DMA_DW8 | DMA_NC }, /* EP0WR */
DMA_DW8            91 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x08, DMA_DW8 | DMA_NC }, /* EP2WR */
DMA_DW8            92 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x0c, DMA_DW8 | DMA_NC }, /* EP3WR */
DMA_DW8            93 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x10, DMA_DW8 | DMA_NC | DMA_DR }, /* EP4RD */
DMA_DW8            94 arch/mips/alchemy/common/dma.c 	{ AU1000_USB_UDC_PHYS_ADDR + 0x14, DMA_DW8 | DMA_NC | DMA_DR }, /* EP5RD */
DMA_DW8           128 arch/mips/alchemy/common/dma.c 	{ AU1100_SD0_PHYS_ADDR + 0x00, DMA_DS | DMA_DW8 },		/* coherent */
DMA_DW8           129 arch/mips/alchemy/common/dma.c 	{ AU1100_SD0_PHYS_ADDR + 0x04, DMA_DS | DMA_DW8 | DMA_DR },	/* coherent */
DMA_DW8           130 arch/mips/alchemy/common/dma.c 	{ AU1100_SD1_PHYS_ADDR + 0x00, DMA_DS | DMA_DW8 },		/* coherent */
DMA_DW8           131 arch/mips/alchemy/common/dma.c 	{ AU1100_SD1_PHYS_ADDR + 0x04, DMA_DS | DMA_DW8 | DMA_DR }	/* coherent */