DMA_CNTL          172 drivers/gpu/drm/amd/amdgpu/si_dma.c 		dma_cntl = RREG32(DMA_CNTL + sdma_offsets[i]);
DMA_CNTL          174 drivers/gpu/drm/amd/amdgpu/si_dma.c 		WREG32(DMA_CNTL + sdma_offsets[i], dma_cntl);
DMA_CNTL          597 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET);
DMA_CNTL          599 drivers/gpu/drm/amd/amdgpu/si_dma.c 			WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);
DMA_CNTL          602 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET);
DMA_CNTL          604 drivers/gpu/drm/amd/amdgpu/si_dma.c 			WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, sdma_cntl);
DMA_CNTL          613 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET);
DMA_CNTL          615 drivers/gpu/drm/amd/amdgpu/si_dma.c 			WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);
DMA_CNTL          618 drivers/gpu/drm/amd/amdgpu/si_dma.c 			sdma_cntl = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET);
DMA_CNTL          620 drivers/gpu/drm/amd/amdgpu/si_dma.c 			WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, sdma_cntl);
DMA_CNTL         4472 drivers/gpu/drm/radeon/evergreen.c 	tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
DMA_CNTL         4473 drivers/gpu/drm/radeon/evergreen.c 	WREG32(DMA_CNTL, tmp);
DMA_CNTL         4519 drivers/gpu/drm/radeon/evergreen.c 	dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
DMA_CNTL         4568 drivers/gpu/drm/radeon/evergreen.c 	WREG32(DMA_CNTL, dma_cntl);
DMA_CNTL          239 drivers/gpu/drm/radeon/ni_dma.c 		dma_cntl = RREG32(DMA_CNTL + reg_offset);
DMA_CNTL          241 drivers/gpu/drm/radeon/ni_dma.c 		WREG32(DMA_CNTL + reg_offset, dma_cntl);
DMA_CNTL         3626 drivers/gpu/drm/radeon/r600.c 	tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
DMA_CNTL         3627 drivers/gpu/drm/radeon/r600.c 	WREG32(DMA_CNTL, tmp);
DMA_CNTL         3808 drivers/gpu/drm/radeon/r600.c 	dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
DMA_CNTL         3877 drivers/gpu/drm/radeon/r600.c 	WREG32(DMA_CNTL, dma_cntl);
DMA_CNTL          160 drivers/gpu/drm/radeon/r600_dma.c 	dma_cntl = RREG32(DMA_CNTL);
DMA_CNTL          162 drivers/gpu/drm/radeon/r600_dma.c 	WREG32(DMA_CNTL, dma_cntl);
DMA_CNTL         5958 drivers/gpu/drm/radeon/si.c 	tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE;
DMA_CNTL         5959 drivers/gpu/drm/radeon/si.c 	WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, tmp);
DMA_CNTL         5960 drivers/gpu/drm/radeon/si.c 	tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE;
DMA_CNTL         5961 drivers/gpu/drm/radeon/si.c 	WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp);
DMA_CNTL         6074 drivers/gpu/drm/radeon/si.c 	dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE;
DMA_CNTL         6075 drivers/gpu/drm/radeon/si.c 	dma_cntl1 = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE;
DMA_CNTL         6107 drivers/gpu/drm/radeon/si.c 	WREG32(DMA_CNTL + DMA0_REGISTER_OFFSET, dma_cntl);
DMA_CNTL         6108 drivers/gpu/drm/radeon/si.c 	WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, dma_cntl1);