DMA_CH_TCR 196 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, DMA_CH_TCR 215 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, OSP, DMA_CH_TCR 305 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, TSE, 1); DMA_CH_TCR 3291 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, ST, 1); DMA_CH_TCR 3323 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, ST, 0); DMA_CH_TCR 3413 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, ST, 1); DMA_CH_TCR 3436 drivers/net/ethernet/amd/xgbe/xgbe-dev.c XGMAC_DMA_IOWRITE_BITS(pdata->channel[i], DMA_CH_TCR, ST, 0); DMA_CH_TCR 509 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 512 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 566 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 569 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 1389 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 1392 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 1750 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 1754 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 1782 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c regval = readl(XLGMAC_DMA_REG(pdata->channel_head, DMA_CH_TCR)); DMA_CH_TCR 1799 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c regval = readl(XLGMAC_DMA_REG(channel, DMA_CH_TCR)); DMA_CH_TCR 1803 drivers/net/ethernet/synopsys/dwc-xlgmac-hw.c writel(regval, XLGMAC_DMA_REG(channel, DMA_CH_TCR));