DMA_CHANX_BASE_ADDR   91 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CONTROL(x)		DMA_CHANX_BASE_ADDR(x)
DMA_CHANX_BASE_ADDR   92 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_TX_CONTROL(x)		(DMA_CHANX_BASE_ADDR(x) + 0x4)
DMA_CHANX_BASE_ADDR   93 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_CONTROL(x)		(DMA_CHANX_BASE_ADDR(x) + 0x8)
DMA_CHANX_BASE_ADDR   94 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_TX_BASE_ADDR(x)	(DMA_CHANX_BASE_ADDR(x) + 0x14)
DMA_CHANX_BASE_ADDR   95 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_BASE_ADDR(x)	(DMA_CHANX_BASE_ADDR(x) + 0x1c)
DMA_CHANX_BASE_ADDR   96 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_TX_END_ADDR(x)		(DMA_CHANX_BASE_ADDR(x) + 0x20)
DMA_CHANX_BASE_ADDR   97 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_END_ADDR(x)		(DMA_CHANX_BASE_ADDR(x) + 0x28)
DMA_CHANX_BASE_ADDR   98 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_TX_RING_LEN(x)		(DMA_CHANX_BASE_ADDR(x) + 0x2c)
DMA_CHANX_BASE_ADDR   99 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_RING_LEN(x)		(DMA_CHANX_BASE_ADDR(x) + 0x30)
DMA_CHANX_BASE_ADDR  100 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_INTR_ENA(x)		(DMA_CHANX_BASE_ADDR(x) + 0x34)
DMA_CHANX_BASE_ADDR  101 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_RX_WATCHDOG(x)		(DMA_CHANX_BASE_ADDR(x) + 0x38)
DMA_CHANX_BASE_ADDR  102 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_SLOT_CTRL_STATUS(x)	(DMA_CHANX_BASE_ADDR(x) + 0x3c)
DMA_CHANX_BASE_ADDR  103 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CUR_TX_DESC(x)		(DMA_CHANX_BASE_ADDR(x) + 0x44)
DMA_CHANX_BASE_ADDR  104 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CUR_RX_DESC(x)		(DMA_CHANX_BASE_ADDR(x) + 0x4c)
DMA_CHANX_BASE_ADDR  105 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CUR_TX_BUF_ADDR(x)	(DMA_CHANX_BASE_ADDR(x) + 0x54)
DMA_CHANX_BASE_ADDR  106 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_CUR_RX_BUF_ADDR(x)	(DMA_CHANX_BASE_ADDR(x) + 0x5c)
DMA_CHANX_BASE_ADDR  107 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h #define DMA_CHAN_STATUS(x)		(DMA_CHANX_BASE_ADDR(x) + 0x60)