DMA_CHANNEL        48 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p0", EP93XX_DMA_BASE + 0x0000, IRQ_EP93XX_DMAM2P0),
DMA_CHANNEL        49 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p1", EP93XX_DMA_BASE + 0x0040, IRQ_EP93XX_DMAM2P1),
DMA_CHANNEL        50 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p2", EP93XX_DMA_BASE + 0x0080, IRQ_EP93XX_DMAM2P2),
DMA_CHANNEL        51 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p3", EP93XX_DMA_BASE + 0x00c0, IRQ_EP93XX_DMAM2P3),
DMA_CHANNEL        52 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p4", EP93XX_DMA_BASE + 0x0240, IRQ_EP93XX_DMAM2P4),
DMA_CHANNEL        53 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p5", EP93XX_DMA_BASE + 0x0200, IRQ_EP93XX_DMAM2P5),
DMA_CHANNEL        54 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p6", EP93XX_DMA_BASE + 0x02c0, IRQ_EP93XX_DMAM2P6),
DMA_CHANNEL        55 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p7", EP93XX_DMA_BASE + 0x0280, IRQ_EP93XX_DMAM2P7),
DMA_CHANNEL        56 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p8", EP93XX_DMA_BASE + 0x0340, IRQ_EP93XX_DMAM2P8),
DMA_CHANNEL        57 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2p9", EP93XX_DMA_BASE + 0x0300, IRQ_EP93XX_DMAM2P9),
DMA_CHANNEL        87 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2m0", EP93XX_DMA_BASE + 0x0100, IRQ_EP93XX_DMAM2M0),
DMA_CHANNEL        88 arch/arm/mach-ep93xx/dma.c 	DMA_CHANNEL("m2m1", EP93XX_DMA_BASE + 0x0140, IRQ_EP93XX_DMAM2M1),
DMA_CHANNEL       369 drivers/mmc/host/au1xmmc.c 			u32 chan = DMA_CHANNEL(host);
DMA_CHANNEL       587 drivers/mmc/host/au1xmmc.c 		u32 channel = DMA_CHANNEL(host);
DMA_CHANNEL       642 drivers/mmc/host/au1xmmc.c 		u32 channel = DMA_CHANNEL(host);