DMAC0_5           850 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_VECT(DMAC0_5, 0x640), INTC_VECT(DMAC0_5, 0x660),
DMAC0_5           851 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_VECT(DMAC0_5, 0x680), INTC_VECT(DMAC0_5, 0x6a0),
DMAC0_5           852 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_VECT(DMAC0_5, 0x6c0),
DMAC0_5           856 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	INTC_VECT(DMAC0_5, 0x780), INTC_VECT(DMAC0_5, 0x7a0),
DMAC0_5           966 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	    TMR23, TMR01, 0, 0, 0, 0, 0, DMAC0_5,
DMAC0_5          1063 arch/sh/kernel/cpu/sh4a/setup-sh7757.c 	{ INT2PRI3, 0, 32, 8, { HUDI, DMAC0_5, ADC0, IRQ9 } },
DMAC0_5           511 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	INTC_VECT(DMAC0_4, 0x580), INTC_VECT(DMAC0_5, 0x5a0),
DMAC0_5           588 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	    DMAC0_0, DMAC0_1, DMAC0_2, DMAC0_3, DMAC0_4, DMAC0_5, DMAC0_6,
DMAC0_5           623 arch/sh/kernel/cpu/sh4a/setup-sh7786.c 	{ 0xfe410810, 0, 32, 8, /* INT2PRI4 */ { DMAC0_4, DMAC0_5,