DIVISOR_ENABLE_MASK  270 arch/mips/ar7/clock.c 	writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv);
DIVISOR_ENABLE_MASK  276 arch/mips/ar7/clock.c 	writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv);
DIVISOR_ENABLE_MASK  284 arch/mips/ar7/clock.c 	writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2);