DIVIL_LBAR_PMS     20 arch/mips/loongson64/common/cs5536/cs5536_isa.c 	DIVIL_MSR_REG(DIVIL_LBAR_PMS), DIVIL_MSR_REG(DIVIL_LBAR_ACPI),
DIVIL_LBAR_PMS     58 arch/mips/loongson64/common/cs5536/cs5536_isa.c 	for (offset = DIVIL_LBAR_SMB; offset <= DIVIL_LBAR_PMS; offset++) {
DIVIL_LBAR_PMS     73 arch/mips/loongson64/common/cs5536/cs5536_isa.c 	for (offset = DIVIL_LBAR_SMB; offset <= DIVIL_LBAR_PMS; offset++) {