DIV4_SIUB         116 arch/sh/kernel/cpu/sh4a/clock-sh7343.c 	[DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x1fff, 0),
DIV4_SIUB         200 arch/sh/kernel/cpu/sh4a/clock-sh7343.c 	CLKDEV_CON_ID("siub_clk", &div4_clks[DIV4_SIUB]),
DIV4_SIUB         119 arch/sh/kernel/cpu/sh4a/clock-sh7366.c 	[DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x1fff, 0),
DIV4_SIUB         198 arch/sh/kernel/cpu/sh4a/clock-sh7366.c 	CLKDEV_CON_ID("siub_clk", &div4_clks[DIV4_SIUB]),
DIV4_SIUB         132 arch/sh/kernel/cpu/sh4a/clock-sh7722.c 	[DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x1fff, 0),
DIV4_SIUB         185 arch/sh/kernel/cpu/sh4a/clock-sh7722.c 	CLKDEV_CON_ID("siub_clk", &div4_reparent_clks[DIV4_SIUB]),
DIV4_SIUB         133 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[DIV4_SIUB] = DIV4(SCLKBCR, 0, 0x0dbf, 0),
DIV4_SIUB         210 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_CON_ID("siub_clk", &div4_reparent_clks[DIV4_SIUB]),