DIV4_SIUA         115 arch/sh/kernel/cpu/sh4a/clock-sh7343.c 	[DIV4_SIUA] = DIV4(SCLKACR, 0, 0x1fff, 0),
DIV4_SIUA         199 arch/sh/kernel/cpu/sh4a/clock-sh7343.c 	CLKDEV_CON_ID("siua_clk", &div4_clks[DIV4_SIUA]),
DIV4_SIUA         118 arch/sh/kernel/cpu/sh4a/clock-sh7366.c 	[DIV4_SIUA] = DIV4(SCLKACR, 0, 0x1fff, 0),
DIV4_SIUA         197 arch/sh/kernel/cpu/sh4a/clock-sh7366.c 	CLKDEV_CON_ID("siua_clk", &div4_clks[DIV4_SIUA]),
DIV4_SIUA         131 arch/sh/kernel/cpu/sh4a/clock-sh7722.c 	[DIV4_SIUA] = DIV4(SCLKACR, 0, 0x1fff, 0),
DIV4_SIUA         184 arch/sh/kernel/cpu/sh4a/clock-sh7722.c 	CLKDEV_CON_ID("siua_clk", &div4_reparent_clks[DIV4_SIUA]),
DIV4_SIUA         132 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	[DIV4_SIUA] = DIV4(SCLKACR, 0, 0x0dbf, 0),
DIV4_SIUA         209 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 	CLKDEV_CON_ID("siua_clk", &div4_reparent_clks[DIV4_SIUA]),