DIV4_NR            81 arch/sh/kernel/cpu/sh2a/clock-sh7264.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR           151 arch/sh/kernel/cpu/sh2a/clock-sh7264.c 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
DIV4_NR           109 arch/sh/kernel/cpu/sh2a/clock-sh7269.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR           175 arch/sh/kernel/cpu/sh2a/clock-sh7269.c 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
DIV4_NR           108 arch/sh/kernel/cpu/sh4a/clock-sh7343.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR           268 arch/sh/kernel/cpu/sh4a/clock-sh7343.c 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
DIV4_NR           111 arch/sh/kernel/cpu/sh4a/clock-sh7366.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR           261 arch/sh/kernel/cpu/sh4a/clock-sh7366.c 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
DIV4_NR           113 arch/sh/kernel/cpu/sh4a/clock-sh7722.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR           236 arch/sh/kernel/cpu/sh4a/clock-sh7722.c 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
DIV4_NR           114 arch/sh/kernel/cpu/sh4a/clock-sh7723.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR           284 arch/sh/kernel/cpu/sh4a/clock-sh7723.c 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
DIV4_NR           153 arch/sh/kernel/cpu/sh4a/clock-sh7724.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR           358 arch/sh/kernel/cpu/sh4a/clock-sh7724.c 		ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
DIV4_NR            72 arch/sh/kernel/cpu/sh4a/clock-sh7734.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR            65 arch/sh/kernel/cpu/sh4a/clock-sh7757.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR            69 arch/sh/kernel/cpu/sh4a/clock-sh7785.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR            70 arch/sh/kernel/cpu/sh4a/clock-sh7786.c struct clk div4_clks[DIV4_NR] = {
DIV4_NR            64 arch/sh/kernel/cpu/sh4a/clock-shx3.c struct clk div4_clks[DIV4_NR] = {