DISPC_CONFIG      267 drivers/gpu/drm/omapdrm/dss/dispc.c 			[DISPC_MGR_FLD_TCKENABLE]	= { DISPC_CONFIG,  10, 10 },
DISPC_CONFIG      268 drivers/gpu/drm/omapdrm/dss/dispc.c 			[DISPC_MGR_FLD_TCKSELECTION]	= { DISPC_CONFIG,  11, 11 },
DISPC_CONFIG      269 drivers/gpu/drm/omapdrm/dss/dispc.c 			[DISPC_MGR_FLD_CPR]		= { DISPC_CONFIG,  15, 15 },
DISPC_CONFIG      270 drivers/gpu/drm/omapdrm/dss/dispc.c 			[DISPC_MGR_FLD_FIFOHANDCHECK]	= { DISPC_CONFIG,  16, 16 },
DISPC_CONFIG      290 drivers/gpu/drm/omapdrm/dss/dispc.c 			[DISPC_MGR_FLD_TCKENABLE]	= { DISPC_CONFIG,  12, 12 },
DISPC_CONFIG      291 drivers/gpu/drm/omapdrm/dss/dispc.c 			[DISPC_MGR_FLD_TCKSELECTION]	= { DISPC_CONFIG,  13, 13 },
DISPC_CONFIG      293 drivers/gpu/drm/omapdrm/dss/dispc.c 			[DISPC_MGR_FLD_FIFOHANDCHECK]	= { DISPC_CONFIG,  16, 16 },
DISPC_CONFIG      380 drivers/gpu/drm/omapdrm/dss/dispc.c 	const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG;
DISPC_CONFIG     1510 drivers/gpu/drm/omapdrm/dss/dispc.c 	REG_FLD_MOD(dispc, DISPC_CONFIG, enable ? 1 : 0, 14, 14);
DISPC_CONFIG     2929 drivers/gpu/drm/omapdrm/dss/dispc.c 	REG_FLD_MOD(dispc, DISPC_CONFIG, mode, 2, 1);
DISPC_CONFIG     2963 drivers/gpu/drm/omapdrm/dss/dispc.c 		REG_FLD_MOD(dispc, DISPC_CONFIG, enable, 18, 18);
DISPC_CONFIG     2965 drivers/gpu/drm/omapdrm/dss/dispc.c 		REG_FLD_MOD(dispc, DISPC_CONFIG, enable, 19, 19);
DISPC_CONFIG     3483 drivers/gpu/drm/omapdrm/dss/dispc.c 	DUMPREG(dispc, DISPC_CONFIG);
DISPC_CONFIG     3939 drivers/gpu/drm/omapdrm/dss/dispc.c 		REG_FLD_MOD(dispc, DISPC_CONFIG, 1, 3, 3);
DISPC_CONFIG     3947 drivers/gpu/drm/omapdrm/dss/dispc.c 		REG_FLD_MOD(dispc, DISPC_CONFIG, 1, 9, 9);
DISPC_CONFIG     4644 drivers/gpu/drm/omapdrm/dss/dispc.c 	gatestate = REG_GET(dispc, DISPC_CONFIG, 8, 4);
DISPC_CONFIG     4651 drivers/gpu/drm/omapdrm/dss/dispc.c 	REG_FLD_MOD(dispc, DISPC_CONFIG, 0x1f, 8, 4);
DISPC_CONFIG     4689 drivers/gpu/drm/omapdrm/dss/dispc.c 	REG_FLD_MOD(dispc, DISPC_CONFIG, gatestate, 8, 4);
DISPC_CONFIG     4908 drivers/gpu/drm/omapdrm/dss/dispc.c 	if (REG_GET(dispc, DISPC_CONFIG, 2, 1) != OMAP_DSS_LOAD_FRAME_ONLY) {
DISPC_CONFIG      179 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 			[DISPC_MGR_FLD_TCKENABLE]	= { DISPC_CONFIG,  10, 10 },
DISPC_CONFIG      180 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 			[DISPC_MGR_FLD_TCKSELECTION]	= { DISPC_CONFIG,  11, 11 },
DISPC_CONFIG      181 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 			[DISPC_MGR_FLD_CPR]		= { DISPC_CONFIG,  15, 15 },
DISPC_CONFIG      182 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 			[DISPC_MGR_FLD_FIFOHANDCHECK]	= { DISPC_CONFIG,  16, 16 },
DISPC_CONFIG      196 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 			[DISPC_MGR_FLD_TCKENABLE]	= { DISPC_CONFIG,  12, 12 },
DISPC_CONFIG      197 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 			[DISPC_MGR_FLD_TCKSELECTION]	= { DISPC_CONFIG,  13, 13 },
DISPC_CONFIG      199 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 			[DISPC_MGR_FLD_FIFOHANDCHECK]	= { DISPC_CONFIG,  16, 16 },
DISPC_CONFIG      270 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	const bool need_lock = rfld.reg == DISPC_CONTROL || rfld.reg == DISPC_CONFIG;
DISPC_CONFIG     1078 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	REG_FLD_MOD(DISPC_CONFIG, enable, 9, 9);
DISPC_CONFIG     1276 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	REG_FLD_MOD(DISPC_CONFIG, enable ? 1 : 0, 14, 14);
DISPC_CONFIG     2953 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	REG_FLD_MOD(DISPC_CONFIG, mode, 2, 1);
DISPC_CONFIG     2983 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 		REG_FLD_MOD(DISPC_CONFIG, enable, 18, 18);
DISPC_CONFIG     2985 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 		REG_FLD_MOD(DISPC_CONFIG, enable, 19, 19);
DISPC_CONFIG     3523 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	DUMPREG(DISPC_CONFIG);
DISPC_CONFIG     3844 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 		REG_FLD_MOD(DISPC_CONFIG, 1, 9, 9);
DISPC_CONFIG     4160 drivers/video/fbdev/omap2/omapfb/dss/dispc.c 	if (REG_GET(DISPC_CONFIG, 2, 1) != OMAP_DSS_LOAD_FRAME_ONLY) {