DIG_MODE          887 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 0);
DIG_MODE          891 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 1);
DIG_MODE          896 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 2);
DIG_MODE          900 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 3);
DIG_MODE          904 drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 5);
DIG_MODE          881 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 0);
DIG_MODE          885 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 1);
DIG_MODE          890 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 2);
DIG_MODE          894 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 3);
DIG_MODE          898 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 		REG_UPDATE(DIG_BE_CNTL, DIG_MODE, 5);
DIG_MODE         1407 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.c 	REG_GET(DIG_BE_CNTL, DIG_MODE, &value);
DIG_MODE          134 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h 	LE_SF(DIG0_DIG_BE_CNTL, DIG_MODE, mask_sh),\
DIG_MODE          184 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_link_encoder.h 	type DIG_MODE;\