DIDT_SQ_CTRL0__PHASE_OFFSET_MASK  144 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c 	{   ixDIDT_SQ_CTRL0,                   DIDT_SQ_CTRL0__PHASE_OFFSET_MASK,                   DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT,                 0x0000,     GPU_CONFIGREG_DIDT_IND },
DIDT_SQ_CTRL0__PHASE_OFFSET_MASK  286 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c 	{   ixDIDT_SQ_CTRL0,                   DIDT_SQ_CTRL0__PHASE_OFFSET_MASK,                   DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT,                 0x0000,     GPU_CONFIGREG_DIDT_IND },
DIDT_SQ_CTRL0__PHASE_OFFSET_MASK  428 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c 	{   ixDIDT_SQ_CTRL0,                   DIDT_SQ_CTRL0__PHASE_OFFSET_MASK,                   DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT,                 0x0000,     GPU_CONFIGREG_DIDT_IND },
DIDT_SQ_CTRL0__PHASE_OFFSET_MASK  571 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c 	{   ixDIDT_SQ_CTRL0,                   DIDT_SQ_CTRL0__PHASE_OFFSET_MASK,                   DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT,                 0x0000,     GPU_CONFIGREG_DIDT_IND },
DIDT_SQ_CTRL0__PHASE_OFFSET_MASK  754 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_powertune.c     {   ixDIDT_SQ_CTRL0,                   DIDT_SQ_CTRL0__PHASE_OFFSET_MASK,                   DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT,                 0x0000,     GPU_CONFIGREG_DIDT_IND },
DIDT_SQ_CTRL0__PHASE_OFFSET_MASK  212 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c 	{  ixDIDT_SQ_CTRL0,                   DIDT_SQ_CTRL0__PHASE_OFFSET_MASK,   DIDT_SQ_CTRL0__PHASE_OFFSET__SHIFT,  0x0000 },