DEV_FLAGS_OUT 67 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, DEV_FLAGS_OUT 69 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 }, DEV_FLAGS_OUT 80 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 }, DEV_FLAGS_OUT 81 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_USBDEV_TX1, DEV_FLAGS_OUT, 4, 8, 0x10200008, 0, 0 }, DEV_FLAGS_OUT 82 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_USBDEV_TX2, DEV_FLAGS_OUT, 4, 8, 0x1020000c, 0, 0 }, DEV_FLAGS_OUT 87 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 0, 0x11a0001c, 0, 0 }, DEV_FLAGS_OUT 89 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 0, 0x11b0001c, 0, 0 }, DEV_FLAGS_OUT 91 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_PSC2_TX, DEV_FLAGS_OUT, 0, 0, 0x10a0001c, 0, 0 }, DEV_FLAGS_OUT 93 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_PSC3_TX, DEV_FLAGS_OUT, 0, 0, 0x10b0001c, 0, 0 }, DEV_FLAGS_OUT 101 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_MAC0_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, DEV_FLAGS_OUT 105 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_MAC1_TX, DEV_FLAGS_OUT, 0, 0, 0x00000000, 0, 0 }, DEV_FLAGS_OUT 112 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, DEV_FLAGS_OUT 114 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_UART1_TX, DEV_FLAGS_OUT, 0, 8, 0x11200004, 0, 0 }, DEV_FLAGS_OUT 125 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 }, DEV_FLAGS_OUT 127 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 4, 8, 0x10680000, 0, 0 }, DEV_FLAGS_OUT 131 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 }, DEV_FLAGS_OUT 133 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 16, 0x11a0001c, 0, 0 }, DEV_FLAGS_OUT 136 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 16, 0x11b0001c, 0, 0 }, DEV_FLAGS_OUT 152 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x10100004, 0, 0 }, DEV_FLAGS_OUT 154 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_UART1_TX, DEV_FLAGS_OUT, 0, 8, 0x10101004, 0, 0 }, DEV_FLAGS_OUT 156 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_UART2_TX, DEV_FLAGS_OUT, 0, 8, 0x10102004, 0, 0 }, DEV_FLAGS_OUT 158 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x10103004, 0, 0 }, DEV_FLAGS_OUT 161 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_SDMS_TX0, DEV_FLAGS_OUT, 4, 8, 0x10600000, 0, 0 }, DEV_FLAGS_OUT 163 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_SDMS_TX1, DEV_FLAGS_OUT, 8, 8, 0x10601000, 0, 0 }, DEV_FLAGS_OUT 167 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_AES_TX, DEV_FLAGS_OUT, 4, 32, 0x10300004, 0, 0 }, DEV_FLAGS_OUT 169 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_PSC0_TX, DEV_FLAGS_OUT, 0, 16, 0x10a0001c, 0, 0 }, DEV_FLAGS_OUT 171 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_PSC1_TX, DEV_FLAGS_OUT, 0, 16, 0x10a0101c, 0, 0 }, DEV_FLAGS_OUT 173 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_PSC2_TX, DEV_FLAGS_OUT, 0, 16, 0x10a0201c, 0, 0 }, DEV_FLAGS_OUT 175 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_PSC3_TX, DEV_FLAGS_OUT, 0, 16, 0x10a0301c, 0, 0 }, DEV_FLAGS_OUT 181 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_SDMS_TX2, DEV_FLAGS_OUT, 4, 8, 0x10602000, 0, 0 }, DEV_FLAGS_OUT 380 arch/mips/alchemy/common/dbdma.c if (dtp->dev_flags & DEV_FLAGS_OUT) { /* Destination out fifo */ DEV_FLAGS_OUT 492 arch/mips/alchemy/common/dbdma.c if (dtp->dev_flags & DEV_FLAGS_OUT) DEV_FLAGS_OUT 547 arch/mips/alchemy/common/dbdma.c if (dtp->dev_flags & DEV_FLAGS_OUT) { DEV_FLAGS_OUT 365 drivers/ide/au1xxx-ide.c DEV_FLAGS_OUT | flags, auide->regbase); DEV_FLAGS_OUT 417 drivers/ide/au1xxx-ide.c DEV_FLAGS_OUT | flags, auide->regbase);