DEV_FLAGS_IN 68 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, DEV_FLAGS_IN 70 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 }, DEV_FLAGS_IN 79 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 }, DEV_FLAGS_IN 83 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_USBDEV_RX3, DEV_FLAGS_IN, 4, 8, 0x10200010, 0, 0 }, DEV_FLAGS_IN 84 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_USBDEV_RX4, DEV_FLAGS_IN, 4, 8, 0x10200014, 0, 0 }, DEV_FLAGS_IN 88 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 0, 0x11a0001c, 0, 0 }, DEV_FLAGS_IN 90 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 0, 0x11b0001c, 0, 0 }, DEV_FLAGS_IN 92 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_PSC2_RX, DEV_FLAGS_IN, 0, 0, 0x10a0001c, 0, 0 }, DEV_FLAGS_IN 94 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_PSC3_RX, DEV_FLAGS_IN, 0, 0, 0x10b0001c, 0, 0 }, DEV_FLAGS_IN 100 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_MAC0_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, DEV_FLAGS_IN 104 arch/mips/alchemy/common/dbdma.c { AU1550_DSCR_CMD0_MAC1_RX, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, DEV_FLAGS_IN 113 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, DEV_FLAGS_IN 115 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_UART1_RX, DEV_FLAGS_IN, 0, 8, 0x11200000, 0, 0 }, DEV_FLAGS_IN 126 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 }, DEV_FLAGS_IN 128 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 4, 8, 0x10680004, 0, 0 }, DEV_FLAGS_IN 130 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 }, DEV_FLAGS_IN 134 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 16, 0x11a0001c, 0, 0 }, DEV_FLAGS_IN 137 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 16, 0x11b0001c, 0, 0 }, DEV_FLAGS_IN 140 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_CIM_RXA, DEV_FLAGS_IN, 0, 32, 0x14004020, 0, 0 }, DEV_FLAGS_IN 141 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_CIM_RXB, DEV_FLAGS_IN, 0, 32, 0x14004040, 0, 0 }, DEV_FLAGS_IN 142 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_CIM_RXC, DEV_FLAGS_IN, 0, 32, 0x14004060, 0, 0 }, DEV_FLAGS_IN 145 arch/mips/alchemy/common/dbdma.c { AU1200_DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, DEV_FLAGS_IN 153 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x10100000, 0, 0 }, DEV_FLAGS_IN 155 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_UART1_RX, DEV_FLAGS_IN, 0, 8, 0x10101000, 0, 0 }, DEV_FLAGS_IN 157 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_UART2_RX, DEV_FLAGS_IN, 0, 8, 0x10102000, 0, 0 }, DEV_FLAGS_IN 159 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x10103000, 0, 0 }, DEV_FLAGS_IN 162 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_SDMS_RX0, DEV_FLAGS_IN, 4, 8, 0x10600004, 0, 0 }, DEV_FLAGS_IN 164 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_SDMS_RX1, DEV_FLAGS_IN, 8, 8, 0x10601004, 0, 0 }, DEV_FLAGS_IN 166 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_AES_RX, DEV_FLAGS_IN , 4, 32, 0x10300008, 0, 0 }, DEV_FLAGS_IN 170 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_PSC0_RX, DEV_FLAGS_IN, 0, 16, 0x10a0001c, 0, 0 }, DEV_FLAGS_IN 172 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_PSC1_RX, DEV_FLAGS_IN, 0, 16, 0x10a0101c, 0, 0 }, DEV_FLAGS_IN 174 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_PSC2_RX, DEV_FLAGS_IN, 0, 16, 0x10a0201c, 0, 0 }, DEV_FLAGS_IN 176 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_PSC3_RX, DEV_FLAGS_IN, 0, 16, 0x10a0301c, 0, 0 }, DEV_FLAGS_IN 179 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_NAND_FLASH, DEV_FLAGS_IN, 0, 0, 0x00000000, 0, 0 }, DEV_FLAGS_IN 182 arch/mips/alchemy/common/dbdma.c { AU1300_DSCR_CMD0_SDMS_RX2, DEV_FLAGS_IN, 4, 8, 0x10602004, 0, 0 }, DEV_FLAGS_IN 376 arch/mips/alchemy/common/dbdma.c if (stp->dev_flags & DEV_FLAGS_IN) { /* Source in fifo */ DEV_FLAGS_IN 490 arch/mips/alchemy/common/dbdma.c if (stp->dev_flags & DEV_FLAGS_IN) DEV_FLAGS_IN 516 arch/mips/alchemy/common/dbdma.c if (stp->dev_flags & DEV_FLAGS_IN) { DEV_FLAGS_IN 369 drivers/ide/au1xxx-ide.c DEV_FLAGS_IN | flags, auide->regbase); DEV_FLAGS_IN 421 drivers/ide/au1xxx-ide.c DEV_FLAGS_IN | flags, auide->regbase);