DEV 279 drivers/block/skd_main.c #define SKD_WRITEL(DEV, VAL, OFF) skd_reg_write32(DEV, VAL, OFF) DEV 280 drivers/block/skd_main.c #define SKD_READL(DEV, OFF) skd_reg_read32(DEV, OFF) DEV 281 drivers/block/skd_main.c #define SKD_WRITEQ(DEV, VAL, OFF) skd_reg_write64(DEV, VAL, OFF) DEV 49 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), "NSP_CORE_INT 0x%016llx\n", value); DEV 59 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), "NPS_PKT_INT 0x%016llx\n", DEV 66 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), DEV 76 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), DEV 82 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), DEV 90 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), DEV 99 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), DEV 105 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), DEV 116 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), "POM_INT 0x%016llx\n", value); DEV 125 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), "PEM(0)_INT 0x%016llx\n", value); DEV 135 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), "LBC_INT 0x%016llx\n", lbc_int.value); DEV 149 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), "CAM_SOFT_ERR, invalidating LBC\n"); DEV 184 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), "ELF_CORE(%d)_INT 0x%016llx\n", DEV 200 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err_ratelimited(DEV(ndev), "BMI_INT 0x%016llx\n", value); DEV 313 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err(DEV(ndev), "msix vectors %d alloc failed\n", nr_vecs); DEV 338 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err(DEV(ndev), "irq failed for pkt ring/port%d\n", DEV 360 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err(DEV(ndev), "irq failed for nitrox-core-int%d\n", i); DEV 417 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err(DEV(ndev), "failed to allocate nps-core-int%d\n", DEV 437 drivers/crypto/cavium/nitrox/nitrox_isr.c dev_err(DEV(ndev), "irq failed for nitrox-core-int%d\n", DEV 30 drivers/crypto/cavium/nitrox/nitrox_lib.c cmdq->unalign_base = dma_alloc_coherent(DEV(ndev), cmdq->qsize, DEV 73 drivers/crypto/cavium/nitrox/nitrox_lib.c dma_free_coherent(DEV(ndev), cmdq->qsize, DEV 195 drivers/crypto/cavium/nitrox/nitrox_lib.c DEV(ndev), size, 16, 0); DEV 133 drivers/crypto/cavium/nitrox/nitrox_main.c dev_info(DEV(ndev), "Loading firmware \"%s\"\n", fw_name); DEV 135 drivers/crypto/cavium/nitrox/nitrox_main.c ret = request_firmware(&fw, fw_name, DEV(ndev)); DEV 137 drivers/crypto/cavium/nitrox/nitrox_main.c dev_err(DEV(ndev), "failed to get firmware %s\n", fw_name); DEV 145 drivers/crypto/cavium/nitrox/nitrox_main.c dev_err(DEV(ndev), "Invalid ucode size: %u for firmware %s\n", DEV 184 drivers/crypto/cavium/nitrox/nitrox_main.c dev_info(DEV(ndev), "Loading firmware \"%s\"\n", fw_name); DEV 186 drivers/crypto/cavium/nitrox/nitrox_main.c ret = request_firmware(&fw, fw_name, DEV(ndev)); DEV 188 drivers/crypto/cavium/nitrox/nitrox_main.c dev_err(DEV(ndev), "failed to get firmware %s\n", fw_name); DEV 196 drivers/crypto/cavium/nitrox/nitrox_main.c dev_err(DEV(ndev), "Invalid ucode size: %u for firmware %s\n", DEV 543 drivers/crypto/cavium/nitrox/nitrox_main.c dev_err(DEV(ndev), "Device refcnt not zero (%d)\n", DEV 548 drivers/crypto/cavium/nitrox/nitrox_main.c dev_info(DEV(ndev), "Removing Device %x:%x\n", DEV 57 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c struct device *dev = DEV(ndev); DEV 135 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c dma = dma_map_single(DEV(ndev), sgtbl->sgcomp, sz_comp, DMA_TO_DEVICE); DEV 136 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c if (dma_mapping_error(DEV(ndev), dma)) { DEV 159 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c struct device *dev = DEV(sr->ndev); DEV 188 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c struct device *dev = DEV(sr->ndev); DEV 557 drivers/crypto/cavium/nitrox/nitrox_reqmgr.c dev_err_ratelimited(DEV(ndev), DEV 159 drivers/crypto/cavium/nitrox/nitrox_sriov.c dev_err(DEV(ndev), "Invalid num_vfs %d\n", num_vfs); DEV 168 drivers/crypto/cavium/nitrox/nitrox_sriov.c dev_err(DEV(ndev), "failed to enable PCI sriov %d\n", err); DEV 171 drivers/crypto/cavium/nitrox/nitrox_sriov.c dev_info(DEV(ndev), "Enabled VF(s) %d\n", num_vfs); DEV 209 drivers/crypto/cavium/nitrox/nitrox_sriov.c dev_warn(DEV(ndev), "VFs are attached to VM. Can't disable SR-IOV\n"); DEV 26 drivers/devfreq/devfreq-event.c #define to_devfreq_event(DEV) container_of(DEV, struct devfreq_event_dev, dev) DEV 16 drivers/devfreq/governor.h #define to_devfreq(DEV) container_of((DEV), struct devfreq, dev) DEV 111 drivers/hwmon/it87.c outb(DEV, ioreg); DEV 1120 drivers/hwmon/pc87360.c superio_outb(sioaddr, DEV, logdev[i]); DEV 116 drivers/hwmon/w83627hf.c outb(DEV, sio->sioaddr); DEV 134 drivers/i2c/busses/i2c-zx2967.c dev_err(DEV(i2c), "fifo size %d over the max value %d\n", DEV 156 drivers/i2c/busses/i2c-zx2967.c dev_err(DEV(i2c), "residue is %d\n", (int)residue); DEV 453 drivers/mfd/sta2x11-mfd.c DEV(STA2X11_MFD_GPIO_NAME, gpio_resources), DEV 454 drivers/mfd/sta2x11-mfd.c DEV(STA2X11_MFD_SCTL_NAME, sctl_resources), DEV 455 drivers/mfd/sta2x11-mfd.c DEV(STA2X11_MFD_SCR_NAME, scr_resources), DEV 456 drivers/mfd/sta2x11-mfd.c DEV(STA2X11_MFD_TIME_NAME, time_resources), DEV 460 drivers/mfd/sta2x11-mfd.c DEV(STA2X11_MFD_APBREG_NAME, apbreg_resources), DEV 484 drivers/mfd/sta2x11-mfd.c DEV(STA2X11_MFD_VIC_NAME, vic_resources), DEV 488 drivers/mfd/sta2x11-mfd.c DEV(STA2X11_MFD_APB_SOC_REGS_NAME, apb_soc_regs_resources), DEV 620 net/sched/em_meta.c [META_ID(DEV)] = META_FUNC(var_dev), DEV 628 net/sched/em_meta.c [META_ID(DEV)] = META_FUNC(int_dev),