DEFINE_UNCORE_FORMAT_ATTR 190 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7"); DEFINE_UNCORE_FORMAT_ATTR 191 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(event5, event, "config:1-5"); DEFINE_UNCORE_FORMAT_ATTR 192 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15"); DEFINE_UNCORE_FORMAT_ATTR 193 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18"); DEFINE_UNCORE_FORMAT_ATTR 194 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23"); DEFINE_UNCORE_FORMAT_ATTR 195 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(thresh8, thresh, "config:24-31"); DEFINE_UNCORE_FORMAT_ATTR 196 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(counter, counter, "config:6-7"); DEFINE_UNCORE_FORMAT_ATTR 197 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(match, match, "config1:0-63"); DEFINE_UNCORE_FORMAT_ATTR 198 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(mask, mask, "config2:0-63"); DEFINE_UNCORE_FORMAT_ATTR 865 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(count_mode, count_mode, "config:2-3"); DEFINE_UNCORE_FORMAT_ATTR 866 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(storage_mode, storage_mode, "config:4-5"); DEFINE_UNCORE_FORMAT_ATTR 867 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(wrap_mode, wrap_mode, "config:6"); DEFINE_UNCORE_FORMAT_ATTR 868 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(flag_mode, flag_mode, "config:7"); DEFINE_UNCORE_FORMAT_ATTR 869 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(inc_sel, inc_sel, "config:9-13"); DEFINE_UNCORE_FORMAT_ATTR 870 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(set_flag_sel, set_flag_sel, "config:19-21"); DEFINE_UNCORE_FORMAT_ATTR 871 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(filter_cfg_en, filter_cfg_en, "config2:63"); DEFINE_UNCORE_FORMAT_ATTR 872 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(filter_match, filter_match, "config2:0-33"); DEFINE_UNCORE_FORMAT_ATTR 873 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(filter_mask, filter_mask, "config2:34-61"); DEFINE_UNCORE_FORMAT_ATTR 874 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(dsp, dsp, "config1:0-31"); DEFINE_UNCORE_FORMAT_ATTR 875 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(thr, thr, "config1:0-31"); DEFINE_UNCORE_FORMAT_ATTR 876 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(fvc, fvc, "config1:0-31"); DEFINE_UNCORE_FORMAT_ATTR 877 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(pgt, pgt, "config1:0-31"); DEFINE_UNCORE_FORMAT_ATTR 878 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(map, map, "config1:0-31"); DEFINE_UNCORE_FORMAT_ATTR 879 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(iss, iss, "config1:0-31"); DEFINE_UNCORE_FORMAT_ATTR 880 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(pld, pld, "config1:32-63"); DEFINE_UNCORE_FORMAT_ATTR 1151 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(xbr_mm_cfg, xbr_mm_cfg, "config:32-63"); DEFINE_UNCORE_FORMAT_ATTR 1152 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(xbr_match, xbr_match, "config1:0-63"); DEFINE_UNCORE_FORMAT_ATTR 1153 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(xbr_mask, xbr_mask, "config2:0-63"); DEFINE_UNCORE_FORMAT_ATTR 1154 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(qlx_cfg, qlx_cfg, "config1:0-15"); DEFINE_UNCORE_FORMAT_ATTR 1155 arch/x86/events/intel/uncore_nhmex.c DEFINE_UNCORE_FORMAT_ATTR(iperf_cfg, iperf_cfg, "config1:0-31"); DEFINE_UNCORE_FORMAT_ATTR 113 arch/x86/events/intel/uncore_snb.c DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7"); DEFINE_UNCORE_FORMAT_ATTR 114 arch/x86/events/intel/uncore_snb.c DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15"); DEFINE_UNCORE_FORMAT_ATTR 115 arch/x86/events/intel/uncore_snb.c DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18"); DEFINE_UNCORE_FORMAT_ATTR 116 arch/x86/events/intel/uncore_snb.c DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23"); DEFINE_UNCORE_FORMAT_ATTR 117 arch/x86/events/intel/uncore_snb.c DEFINE_UNCORE_FORMAT_ATTR(cmask5, cmask, "config:24-28"); DEFINE_UNCORE_FORMAT_ATTR 118 arch/x86/events/intel/uncore_snb.c DEFINE_UNCORE_FORMAT_ATTR(cmask8, cmask, "config:24-31"); DEFINE_UNCORE_FORMAT_ATTR 385 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7"); DEFINE_UNCORE_FORMAT_ATTR 386 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(event2, event, "config:0-6"); DEFINE_UNCORE_FORMAT_ATTR 387 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(event_ext, event, "config:0-7,21"); DEFINE_UNCORE_FORMAT_ATTR 388 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(use_occ_ctr, use_occ_ctr, "config:7"); DEFINE_UNCORE_FORMAT_ATTR 389 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15"); DEFINE_UNCORE_FORMAT_ATTR 390 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(umask_ext, umask, "config:8-15,32-43,45-55"); DEFINE_UNCORE_FORMAT_ATTR 391 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(umask_ext2, umask, "config:8-15,32-57"); DEFINE_UNCORE_FORMAT_ATTR 392 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(umask_ext3, umask, "config:8-15,32-39"); DEFINE_UNCORE_FORMAT_ATTR 393 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(qor, qor, "config:16"); DEFINE_UNCORE_FORMAT_ATTR 394 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18"); DEFINE_UNCORE_FORMAT_ATTR 395 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(tid_en, tid_en, "config:19"); DEFINE_UNCORE_FORMAT_ATTR 396 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23"); DEFINE_UNCORE_FORMAT_ATTR 397 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(thresh9, thresh, "config:24-35"); DEFINE_UNCORE_FORMAT_ATTR 398 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(thresh8, thresh, "config:24-31"); DEFINE_UNCORE_FORMAT_ATTR 399 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(thresh6, thresh, "config:24-29"); DEFINE_UNCORE_FORMAT_ATTR 400 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(thresh5, thresh, "config:24-28"); DEFINE_UNCORE_FORMAT_ATTR 401 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(occ_sel, occ_sel, "config:14-15"); DEFINE_UNCORE_FORMAT_ATTR 402 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(occ_invert, occ_invert, "config:30"); DEFINE_UNCORE_FORMAT_ATTR 403 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(occ_edge, occ_edge, "config:14-51"); DEFINE_UNCORE_FORMAT_ATTR 404 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(occ_edge_det, occ_edge_det, "config:31"); DEFINE_UNCORE_FORMAT_ATTR 405 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(ch_mask, ch_mask, "config:36-43"); DEFINE_UNCORE_FORMAT_ATTR 406 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(ch_mask2, ch_mask, "config:36-47"); DEFINE_UNCORE_FORMAT_ATTR 407 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(fc_mask, fc_mask, "config:44-46"); DEFINE_UNCORE_FORMAT_ATTR 408 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(fc_mask2, fc_mask, "config:48-50"); DEFINE_UNCORE_FORMAT_ATTR 409 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_tid, filter_tid, "config1:0-4"); DEFINE_UNCORE_FORMAT_ATTR 410 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_tid2, filter_tid, "config1:0"); DEFINE_UNCORE_FORMAT_ATTR 411 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_tid3, filter_tid, "config1:0-5"); DEFINE_UNCORE_FORMAT_ATTR 412 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_tid4, filter_tid, "config1:0-8"); DEFINE_UNCORE_FORMAT_ATTR 413 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_tid5, filter_tid, "config1:0-9"); DEFINE_UNCORE_FORMAT_ATTR 414 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_cid, filter_cid, "config1:5"); DEFINE_UNCORE_FORMAT_ATTR 415 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_link, filter_link, "config1:5-8"); DEFINE_UNCORE_FORMAT_ATTR 416 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_link2, filter_link, "config1:6-8"); DEFINE_UNCORE_FORMAT_ATTR 417 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_link3, filter_link, "config1:12"); DEFINE_UNCORE_FORMAT_ATTR 418 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_nid, filter_nid, "config1:10-17"); DEFINE_UNCORE_FORMAT_ATTR 419 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_nid2, filter_nid, "config1:32-47"); DEFINE_UNCORE_FORMAT_ATTR 420 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_state, filter_state, "config1:18-22"); DEFINE_UNCORE_FORMAT_ATTR 421 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_state2, filter_state, "config1:17-22"); DEFINE_UNCORE_FORMAT_ATTR 422 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_state3, filter_state, "config1:17-23"); DEFINE_UNCORE_FORMAT_ATTR 423 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_state4, filter_state, "config1:18-20"); DEFINE_UNCORE_FORMAT_ATTR 424 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_state5, filter_state, "config1:17-26"); DEFINE_UNCORE_FORMAT_ATTR 425 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_rem, filter_rem, "config1:32"); DEFINE_UNCORE_FORMAT_ATTR 426 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_loc, filter_loc, "config1:33"); DEFINE_UNCORE_FORMAT_ATTR 427 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_nm, filter_nm, "config1:36"); DEFINE_UNCORE_FORMAT_ATTR 428 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_not_nm, filter_not_nm, "config1:37"); DEFINE_UNCORE_FORMAT_ATTR 429 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_local, filter_local, "config1:33"); DEFINE_UNCORE_FORMAT_ATTR 430 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_all_op, filter_all_op, "config1:35"); DEFINE_UNCORE_FORMAT_ATTR 431 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_nnm, filter_nnm, "config1:37"); DEFINE_UNCORE_FORMAT_ATTR 432 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_opc, filter_opc, "config1:23-31"); DEFINE_UNCORE_FORMAT_ATTR 433 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_opc2, filter_opc, "config1:52-60"); DEFINE_UNCORE_FORMAT_ATTR 434 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_opc3, filter_opc, "config1:41-60"); DEFINE_UNCORE_FORMAT_ATTR 435 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_opc_0, filter_opc0, "config1:41-50"); DEFINE_UNCORE_FORMAT_ATTR 436 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_opc_1, filter_opc1, "config1:51-60"); DEFINE_UNCORE_FORMAT_ATTR 437 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_nc, filter_nc, "config1:62"); DEFINE_UNCORE_FORMAT_ATTR 438 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_c6, filter_c6, "config1:61"); DEFINE_UNCORE_FORMAT_ATTR 439 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_isoc, filter_isoc, "config1:63"); DEFINE_UNCORE_FORMAT_ATTR 440 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_band0, filter_band0, "config1:0-7"); DEFINE_UNCORE_FORMAT_ATTR 441 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_band1, filter_band1, "config1:8-15"); DEFINE_UNCORE_FORMAT_ATTR 442 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_band2, filter_band2, "config1:16-23"); DEFINE_UNCORE_FORMAT_ATTR 443 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(filter_band3, filter_band3, "config1:24-31"); DEFINE_UNCORE_FORMAT_ATTR 444 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match_rds, match_rds, "config1:48-51"); DEFINE_UNCORE_FORMAT_ATTR 445 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match_rnid30, match_rnid30, "config1:32-35"); DEFINE_UNCORE_FORMAT_ATTR 446 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match_rnid4, match_rnid4, "config1:31"); DEFINE_UNCORE_FORMAT_ATTR 447 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match_dnid, match_dnid, "config1:13-17"); DEFINE_UNCORE_FORMAT_ATTR 448 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match_mc, match_mc, "config1:9-12"); DEFINE_UNCORE_FORMAT_ATTR 449 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match_opc, match_opc, "config1:5-8"); DEFINE_UNCORE_FORMAT_ATTR 450 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match_vnw, match_vnw, "config1:3-4"); DEFINE_UNCORE_FORMAT_ATTR 451 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match0, match0, "config1:0-31"); DEFINE_UNCORE_FORMAT_ATTR 452 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(match1, match1, "config1:32-63"); DEFINE_UNCORE_FORMAT_ATTR 453 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask_rds, mask_rds, "config2:48-51"); DEFINE_UNCORE_FORMAT_ATTR 454 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask_rnid30, mask_rnid30, "config2:32-35"); DEFINE_UNCORE_FORMAT_ATTR 455 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask_rnid4, mask_rnid4, "config2:31"); DEFINE_UNCORE_FORMAT_ATTR 456 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask_dnid, mask_dnid, "config2:13-17"); DEFINE_UNCORE_FORMAT_ATTR 457 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask_mc, mask_mc, "config2:9-12"); DEFINE_UNCORE_FORMAT_ATTR 458 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask_opc, mask_opc, "config2:5-8"); DEFINE_UNCORE_FORMAT_ATTR 459 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask_vnw, mask_vnw, "config2:3-4"); DEFINE_UNCORE_FORMAT_ATTR 460 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask0, mask0, "config2:0-31"); DEFINE_UNCORE_FORMAT_ATTR 461 arch/x86/events/intel/uncore_snbep.c DEFINE_UNCORE_FORMAT_ATTR(mask1, mask1, "config2:32-63");