DEFINE_RES_MEM 42 arch/arm/mach-clps711x/board-dt.c DEFINE_RES_MEM(CLPS711X_PHYS_BASE + HALT, SZ_128); DEFINE_RES_MEM 380 arch/arm/mach-dove/common.c DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), DEFINE_RES_MEM 381 arch/arm/mach-dove/common.c DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04), DEFINE_RES_MEM 141 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc), DEFINE_RES_MEM 193 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c), DEFINE_RES_MEM 232 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000), DEFINE_RES_MEM 293 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000), DEFINE_RES_MEM 380 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18), DEFINE_RES_MEM 443 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10), DEFINE_RES_MEM 454 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10), DEFINE_RES_MEM 522 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800), DEFINE_RES_MEM 541 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE + DEFINE_RES_MEM 570 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c), DEFINE_RES_MEM 644 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100), DEFINE_RES_MEM 704 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac), DEFINE_RES_MEM 730 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08), DEFINE_RES_MEM 744 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38), DEFINE_RES_MEM 840 arch/arm/mach-ep93xx/core.c DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28), DEFINE_RES_MEM 180 arch/arm/mach-ep93xx/ts72xx.c DEFINE_RES_MEM(TS72XX_RTC_INDEX_PHYS_BASE, 0x01), DEFINE_RES_MEM 181 arch/arm/mach-ep93xx/ts72xx.c DEFINE_RES_MEM(TS72XX_RTC_DATA_PHYS_BASE, 0x01), DEFINE_RES_MEM 198 arch/arm/mach-ep93xx/ts72xx.c DEFINE_RES_MEM(TS72XX_WDT_CONTROL_PHYS_BASE, 0x01), DEFINE_RES_MEM 199 arch/arm/mach-ep93xx/ts72xx.c DEFINE_RES_MEM(TS72XX_WDT_FEED_PHYS_BASE, 0x01), DEFINE_RES_MEM 365 arch/arm/mach-ep93xx/ts72xx.c DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100), DEFINE_RES_MEM 134 arch/arm/mach-imx/mach-mx21ads.c DEFINE_RES_MEM(MX21_CS0_BASE_ADDR, SZ_32M); DEFINE_RES_MEM 147 arch/arm/mach-imx/mach-mx21ads.c DEFINE_RES_MEM(MX21ADS_CS8900A_REG, SZ_1K), DEFINE_RES_MEM 101 arch/arm/mach-imx/mach-mx31ads.c DEFINE_RES_MEM(MX31_CS4_BASE_ADDR + CS4_CS8900_MMIO_START, SZ_64K), DEFINE_RES_MEM 66 arch/arm/mach-imx/mm-imx21.c DEFINE_RES_MEM(MX21_AUDMUX_BASE_ADDR, SZ_4K), DEFINE_RES_MEM 66 arch/arm/mach-imx/mm-imx27.c DEFINE_RES_MEM(MX27_AUDMUX_BASE_ADDR, SZ_4K), DEFINE_RES_MEM 166 arch/arm/mach-imx/mm-imx3.c DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K), DEFINE_RES_MEM 170 arch/arm/mach-imx/mm-imx3.c DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), DEFINE_RES_MEM 280 arch/arm/mach-imx/mm-imx3.c DEFINE_RES_MEM(MX35_AUDMUX_BASE_ADDR, SZ_16K), DEFINE_RES_MEM 3 arch/arm/mach-iop32x/gpio-iop32x.h DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x07c4), 0x10), DEFINE_RES_MEM 188 arch/arm/mach-orion5x/common.c DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), DEFINE_RES_MEM 189 arch/arm/mach-orion5x/common.c DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04), DEFINE_RES_MEM 85 arch/arm/mach-orion5x/ts78xx-setup.c DEFINE_RES_MEM(TS_RTC_CTRL, 0x01), DEFINE_RES_MEM 86 arch/arm/mach-orion5x/ts78xx-setup.c DEFINE_RES_MEM(TS_RTC_DATA, 0x01), DEFINE_RES_MEM 252 arch/arm/mach-orion5x/ts78xx-setup.c = DEFINE_RES_MEM(TS_NAND_DATA, 4); DEFINE_RES_MEM 291 arch/arm/mach-orion5x/ts78xx-setup.c = DEFINE_RES_MEM(TS_RNG_DATA, 4); DEFINE_RES_MEM 298 arch/arm/mach-pxa/hx4700.c [0] = DEFINE_RES_MEM(ASIC3_PHYS, ASIC3_MAP_SIZE_16BIT), DEFINE_RES_MEM 301 arch/arm/mach-pxa/hx4700.c [2] = DEFINE_RES_MEM(ASIC3_SD_PHYS, ASIC3_MAP_SIZE_16BIT), DEFINE_RES_MEM 329 arch/arm/mach-pxa/hx4700.c [0] = DEFINE_RES_MEM(PXA_CS5_PHYS, 0x4), DEFINE_RES_MEM 519 arch/arm/mach-pxa/hx4700.c [0] = DEFINE_RES_MEM(ATI_W3220_PHYS, SZ_16M), DEFINE_RES_MEM 753 arch/arm/mach-pxa/hx4700.c [0] = DEFINE_RES_MEM(PXA_CS0_PHYS, SZ_64M), DEFINE_RES_MEM 754 arch/arm/mach-pxa/hx4700.c [1] = DEFINE_RES_MEM(PXA_CS0_PHYS + SZ_64M, SZ_64M), DEFINE_RES_MEM 102 arch/arm/mach-rpc/riscpc.c DEFINE_RES_MEM(0x03400000, 0x00200000), DEFINE_RES_MEM 117 arch/arm/mach-rpc/riscpc.c DEFINE_RES_MEM(0x03200000, 0x10000), DEFINE_RES_MEM 167 arch/arm/mach-rpc/riscpc.c DEFINE_RES_MEM(0x030107c0, 0x20), DEFINE_RES_MEM 168 arch/arm/mach-rpc/riscpc.c DEFINE_RES_MEM(0x03010fd8, 0x04), DEFINE_RES_MEM 33 arch/arm/mach-s3c24xx/bast-ide.c [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRI, 8 * 0x20), DEFINE_RES_MEM 34 arch/arm/mach-s3c24xx/bast-ide.c [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20), DEFINE_RES_MEM 51 arch/arm/mach-s3c24xx/bast-ide.c [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESEC, 8 * 0x20), DEFINE_RES_MEM 52 arch/arm/mach-s3c24xx/bast-ide.c [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20), DEFINE_RES_MEM 247 arch/arm/mach-s3c24xx/common.c [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K), DEFINE_RES_MEM 254 arch/arm/mach-s3c24xx/common.c [0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K), DEFINE_RES_MEM 261 arch/arm/mach-s3c24xx/common.c [0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K), DEFINE_RES_MEM 268 arch/arm/mach-s3c24xx/common.c [0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K), DEFINE_RES_MEM 298 arch/arm/mach-s3c24xx/common.c [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA), DEFINE_RES_MEM 545 arch/arm/mach-s3c24xx/common.c [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA), DEFINE_RES_MEM 662 arch/arm/mach-s3c24xx/common.c [0] = DEFINE_RES_MEM(0x56000084, 0x4), DEFINE_RES_MEM 53 arch/arm/mach-s3c24xx/mach-amlm5900.c DEFINE_RES_MEM(0x00000000, SZ_16M); DEFINE_RES_MEM 231 arch/arm/mach-s3c24xx/mach-anubis.c [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32), DEFINE_RES_MEM 232 arch/arm/mach-s3c24xx/mach-anubis.c [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32), DEFINE_RES_MEM 248 arch/arm/mach-s3c24xx/mach-anubis.c [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32), DEFINE_RES_MEM 249 arch/arm/mach-s3c24xx/mach-anubis.c [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32), DEFINE_RES_MEM 274 arch/arm/mach-s3c24xx/mach-anubis.c [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20), DEFINE_RES_MEM 291 arch/arm/mach-s3c24xx/mach-anubis.c [0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M), DEFINE_RES_MEM 292 arch/arm/mach-s3c24xx/mach-anubis.c [1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M), DEFINE_RES_MEM 118 arch/arm/mach-s3c24xx/mach-at2440evb.c [0] = DEFINE_RES_MEM(S3C2410_CS3, 4), DEFINE_RES_MEM 119 arch/arm/mach-s3c24xx/mach-at2440evb.c [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4), DEFINE_RES_MEM 303 arch/arm/mach-s3c24xx/mach-bast.c [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4), DEFINE_RES_MEM 304 arch/arm/mach-s3c24xx/mach-bast.c [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40), DEFINE_RES_MEM 381 arch/arm/mach-s3c24xx/mach-bast.c [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20), DEFINE_RES_MEM 382 arch/arm/mach-s3c24xx/mach-bast.c [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1), DEFINE_RES_MEM 399 arch/arm/mach-s3c24xx/mach-bast.c [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), \ DEFINE_RES_MEM 361 arch/arm/mach-s3c24xx/mach-gta02.c DEFINE_RES_MEM(GTA02_FLASH_BASE, GTA02_FLASH_SIZE); DEFINE_RES_MEM 305 arch/arm/mach-s3c24xx/mach-mini2440.c [0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4), DEFINE_RES_MEM 306 arch/arm/mach-s3c24xx/mach-mini2440.c [1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4), DEFINE_RES_MEM 82 arch/arm/mach-s3c24xx/mach-nexcoder.c [0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_8M), DEFINE_RES_MEM 243 arch/arm/mach-s3c24xx/mach-osiris.c [0] = DEFINE_RES_MEM(0x0f000000, SZ_1M), DEFINE_RES_MEM 244 arch/arm/mach-s3c24xx/mach-osiris.c [1] = DEFINE_RES_MEM(0x0c000000, SZ_1M), DEFINE_RES_MEM 72 arch/arm/mach-s3c24xx/mach-otom.c [0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_4M), DEFINE_RES_MEM 168 arch/arm/mach-s3c24xx/mach-qt2410.c [0] = DEFINE_RES_MEM(0x19000000, 17), DEFINE_RES_MEM 44 arch/arm/mach-s3c24xx/mach-tct_hammer.c DEFINE_RES_MEM(0x00000000, SZ_16M); DEFINE_RES_MEM 183 arch/arm/mach-s3c24xx/mach-vr1000.c [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4), DEFINE_RES_MEM 184 arch/arm/mach-s3c24xx/mach-vr1000.c [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40), DEFINE_RES_MEM 190 arch/arm/mach-s3c24xx/mach-vr1000.c [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4), DEFINE_RES_MEM 191 arch/arm/mach-s3c24xx/mach-vr1000.c [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40), DEFINE_RES_MEM 52 arch/arm/mach-s3c24xx/simtec-nor.c [0] = DEFINE_RES_MEM(S3C2410_CS1 + 0x4000000, SZ_8M), DEFINE_RES_MEM 51 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS0, SZ_256), DEFINE_RES_MEM 70 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS1, SZ_256), DEFINE_RES_MEM 89 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_IISV4, SZ_256), DEFINE_RES_MEM 135 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM0, SZ_256), DEFINE_RES_MEM 154 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM1, SZ_256), DEFINE_RES_MEM 185 arch/arm/mach-s3c64xx/dev-audio.c [0] = DEFINE_RES_MEM(S3C64XX_PA_AC97, SZ_256), DEFINE_RES_MEM 29 arch/arm/mach-s3c64xx/dev-uart.c [0] = DEFINE_RES_MEM(S3C_PA_UART0, SZ_256), DEFINE_RES_MEM 34 arch/arm/mach-s3c64xx/dev-uart.c [0] = DEFINE_RES_MEM(S3C_PA_UART1, SZ_256), DEFINE_RES_MEM 39 arch/arm/mach-s3c64xx/dev-uart.c [0] = DEFINE_RES_MEM(S3C_PA_UART2, SZ_256), DEFINE_RES_MEM 44 arch/arm/mach-s3c64xx/dev-uart.c [0] = DEFINE_RES_MEM(S3C_PA_UART3, SZ_256), DEFINE_RES_MEM 166 arch/arm/mach-s3c64xx/mach-anw6410.c [0] = DEFINE_RES_MEM(ANW6410_PA_DM9000, 4), DEFINE_RES_MEM 167 arch/arm/mach-s3c64xx/mach-anw6410.c [1] = DEFINE_RES_MEM(ANW6410_PA_DM9000 + 4, 501), DEFINE_RES_MEM 238 arch/arm/mach-s3c64xx/mach-crag6410.c [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2), DEFINE_RES_MEM 239 arch/arm/mach-s3c64xx/mach-crag6410.c [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2), DEFINE_RES_MEM 86 arch/arm/mach-s3c64xx/mach-mini6410.c [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2), DEFINE_RES_MEM 87 arch/arm/mach-s3c64xx/mach-mini6410.c [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2), DEFINE_RES_MEM 85 arch/arm/mach-s3c64xx/mach-real6410.c [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2), DEFINE_RES_MEM 86 arch/arm/mach-s3c64xx/mach-real6410.c [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2), DEFINE_RES_MEM 184 arch/arm/mach-s3c64xx/mach-smdk6410.c [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K), DEFINE_RES_MEM 298 arch/arm/mach-sa1100/assabet.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), DEFINE_RES_MEM 299 arch/arm/mach-sa1100/assabet.c DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), DEFINE_RES_MEM 442 arch/arm/mach-sa1100/assabet.c DEFINE_RES_MEM(0x10000000, 0x08000000), DEFINE_RES_MEM 443 arch/arm/mach-sa1100/assabet.c DEFINE_RES_MEM(0x18000000, 0x04000000), DEFINE_RES_MEM 444 arch/arm/mach-sa1100/assabet.c DEFINE_RES_MEM(0x40000000, SZ_8K), DEFINE_RES_MEM 40 arch/arm/mach-sa1100/badge4.c [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000), DEFINE_RES_MEM 158 arch/arm/mach-sa1100/badge4.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M); DEFINE_RES_MEM 36 arch/arm/mach-sa1100/cerf.c [0] = DEFINE_RES_MEM(0x80030000, SZ_64K), DEFINE_RES_MEM 130 arch/arm/mach-sa1100/cerf.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M); DEFINE_RES_MEM 57 arch/arm/mach-sa1100/collie.c [0] = DEFINE_RES_MEM(0x40800000, SZ_4K), DEFINE_RES_MEM 223 arch/arm/mach-sa1100/collie.c [0] = DEFINE_RES_MEM(0x40000000, SZ_8K), DEFINE_RES_MEM 335 arch/arm/mach-sa1100/collie.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), DEFINE_RES_MEM 122 arch/arm/mach-sa1100/generic.c [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K), DEFINE_RES_MEM 140 arch/arm/mach-sa1100/generic.c [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K), DEFINE_RES_MEM 152 arch/arm/mach-sa1100/generic.c [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K), DEFINE_RES_MEM 164 arch/arm/mach-sa1100/generic.c [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K), DEFINE_RES_MEM 165 arch/arm/mach-sa1100/generic.c [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4), DEFINE_RES_MEM 198 arch/arm/mach-sa1100/generic.c [0] = DEFINE_RES_MEM(0x80070000, SZ_64K), DEFINE_RES_MEM 216 arch/arm/mach-sa1100/generic.c [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K), DEFINE_RES_MEM 257 arch/arm/mach-sa1100/generic.c DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24), DEFINE_RES_MEM 258 arch/arm/mach-sa1100/generic.c DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c), DEFINE_RES_MEM 259 arch/arm/mach-sa1100/generic.c DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04), DEFINE_RES_MEM 276 arch/arm/mach-sa1100/generic.c DEFINE_RES_MEM(0x90010000, 0x40), DEFINE_RES_MEM 289 arch/arm/mach-sa1100/generic.c DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE), DEFINE_RES_MEM 80 arch/arm/mach-sa1100/h3xxx.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M); DEFINE_RES_MEM 137 arch/arm/mach-sa1100/h3xxx.c [0] = DEFINE_RES_MEM(H3600_EGPIO_PHYS, 0x4), DEFINE_RES_MEM 203 arch/arm/mach-sa1100/h3xxx.c DEFINE_RES_MEM(0x80010000, SZ_4K), DEFINE_RES_MEM 204 arch/arm/mach-sa1100/h3xxx.c DEFINE_RES_MEM(0x80020000, SZ_4K), DEFINE_RES_MEM 136 arch/arm/mach-sa1100/hackkit.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M); DEFINE_RES_MEM 175 arch/arm/mach-sa1100/jornada720.c [0] = DEFINE_RES_MEM(EPSONFBSTART, EPSONFBLEN), DEFINE_RES_MEM 176 arch/arm/mach-sa1100/jornada720.c [1] = DEFINE_RES_MEM(EPSONREGSTART, EPSONREGLEN), DEFINE_RES_MEM 201 arch/arm/mach-sa1100/jornada720.c [0] = DEFINE_RES_MEM(SA1111REGSTART, SA1111REGLEN), DEFINE_RES_MEM 360 arch/arm/mach-sa1100/jornada720.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M); DEFINE_RES_MEM 59 arch/arm/mach-sa1100/nanoengine.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), DEFINE_RES_MEM 60 arch/arm/mach-sa1100/nanoengine.c DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), DEFINE_RES_MEM 230 arch/arm/mach-sa1100/neponset.c DEFINE_RES_MEM(0x40000000, SZ_8K), DEFINE_RES_MEM 42 arch/arm/mach-sa1100/pleb.c [0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000), DEFINE_RES_MEM 73 arch/arm/mach-sa1100/pleb.c [0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M), DEFINE_RES_MEM 74 arch/arm/mach-sa1100/pleb.c [1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M), DEFINE_RES_MEM 57 arch/arm/mach-sa1100/shannon.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M); DEFINE_RES_MEM 183 arch/arm/mach-sa1100/simpad.c DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_16M), DEFINE_RES_MEM 184 arch/arm/mach-sa1100/simpad.c DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_16M), DEFINE_RES_MEM 69 arch/arm/mach-shmobile/pm-rcar-gen2.c res = (struct resource)DEFINE_RES_MEM(ICRAM1, DEFINE_RES_MEM 70 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), DEFINE_RES_MEM 90 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), DEFINE_RES_MEM 105 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), DEFINE_RES_MEM 122 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), DEFINE_RES_MEM 143 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), DEFINE_RES_MEM 187 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), DEFINE_RES_MEM 217 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), DEFINE_RES_MEM 249 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), DEFINE_RES_MEM 279 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), DEFINE_RES_MEM 310 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), DEFINE_RES_MEM 345 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), DEFINE_RES_MEM 374 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), DEFINE_RES_MEM 403 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), DEFINE_RES_MEM 432 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), DEFINE_RES_MEM 461 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), DEFINE_RES_MEM 490 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), DEFINE_RES_MEM 519 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), DEFINE_RES_MEM 550 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), DEFINE_RES_MEM 569 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), DEFINE_RES_MEM 590 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), DEFINE_RES_MEM 616 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), DEFINE_RES_MEM 652 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), DEFINE_RES_MEM 747 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), DEFINE_RES_MEM 748 arch/arm/plat-samsung/devs.c [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), DEFINE_RES_MEM 762 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), DEFINE_RES_MEM 763 arch/arm/plat-samsung/devs.c [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), DEFINE_RES_MEM 785 arch/arm/plat-samsung/devs.c DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K), DEFINE_RES_MEM 805 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), DEFINE_RES_MEM 820 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), DEFINE_RES_MEM 837 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), DEFINE_RES_MEM 859 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), DEFINE_RES_MEM 875 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), DEFINE_RES_MEM 895 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), DEFINE_RES_MEM 935 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), DEFINE_RES_MEM 970 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), DEFINE_RES_MEM 991 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K), DEFINE_RES_MEM 1023 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), DEFINE_RES_MEM 1048 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), DEFINE_RES_MEM 1062 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), DEFINE_RES_MEM 1098 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), DEFINE_RES_MEM 1134 arch/arm/plat-samsung/devs.c [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), DEFINE_RES_MEM 66 arch/sh/kernel/cpu/sh2/setup-sh7619.c DEFINE_RES_MEM(0xf8400000, 0x100), DEFINE_RES_MEM 86 arch/sh/kernel/cpu/sh2/setup-sh7619.c DEFINE_RES_MEM(0xf8410000, 0x100), DEFINE_RES_MEM 106 arch/sh/kernel/cpu/sh2/setup-sh7619.c DEFINE_RES_MEM(0xf8420000, 0x100), DEFINE_RES_MEM 153 arch/sh/kernel/cpu/sh2/setup-sh7619.c DEFINE_RES_MEM(0xf84a0070, 0x10), DEFINE_RES_MEM 115 arch/sh/kernel/cpu/sh2a/setup-mxg.c DEFINE_RES_MEM(0xff801000, 0x400), DEFINE_RES_MEM 134 arch/sh/kernel/cpu/sh2a/setup-mxg.c DEFINE_RES_MEM(0xff804000, 0x100), DEFINE_RES_MEM 183 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffe8000, 0x100), DEFINE_RES_MEM 203 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffe8800, 0x100), DEFINE_RES_MEM 223 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffe9000, 0x100), DEFINE_RES_MEM 243 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffe9800, 0x100), DEFINE_RES_MEM 263 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffea000, 0x100), DEFINE_RES_MEM 283 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffea800, 0x100), DEFINE_RES_MEM 303 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffeb000, 0x100), DEFINE_RES_MEM 323 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffeb800, 0x100), DEFINE_RES_MEM 358 arch/sh/kernel/cpu/sh2a/setup-sh7201.c DEFINE_RES_MEM(0xfffe4000, 0x400), DEFINE_RES_MEM 180 arch/sh/kernel/cpu/sh2a/setup-sh7203.c DEFINE_RES_MEM(0xfffe8000, 0x100), DEFINE_RES_MEM 201 arch/sh/kernel/cpu/sh2a/setup-sh7203.c DEFINE_RES_MEM(0xfffe8800, 0x100), DEFINE_RES_MEM 222 arch/sh/kernel/cpu/sh2a/setup-sh7203.c DEFINE_RES_MEM(0xfffe9000, 0x100), DEFINE_RES_MEM 243 arch/sh/kernel/cpu/sh2a/setup-sh7203.c DEFINE_RES_MEM(0xfffe9800, 0x100), DEFINE_RES_MEM 262 arch/sh/kernel/cpu/sh2a/setup-sh7203.c DEFINE_RES_MEM(0xfffec000, 0x10), DEFINE_RES_MEM 278 arch/sh/kernel/cpu/sh2a/setup-sh7203.c DEFINE_RES_MEM(0xfffe4000, 0x400), DEFINE_RES_MEM 139 arch/sh/kernel/cpu/sh2a/setup-sh7206.c DEFINE_RES_MEM(0xfffe8000, 0x100), DEFINE_RES_MEM 159 arch/sh/kernel/cpu/sh2a/setup-sh7206.c DEFINE_RES_MEM(0xfffe8800, 0x100), DEFINE_RES_MEM 179 arch/sh/kernel/cpu/sh2a/setup-sh7206.c DEFINE_RES_MEM(0xfffe9000, 0x100), DEFINE_RES_MEM 199 arch/sh/kernel/cpu/sh2a/setup-sh7206.c DEFINE_RES_MEM(0xfffe9800, 0x100), DEFINE_RES_MEM 218 arch/sh/kernel/cpu/sh2a/setup-sh7206.c DEFINE_RES_MEM(0xfffec000, 0x10), DEFINE_RES_MEM 234 arch/sh/kernel/cpu/sh2a/setup-sh7206.c DEFINE_RES_MEM(0xfffe4000, 0x400), DEFINE_RES_MEM 232 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffe8000, 0x100), DEFINE_RES_MEM 256 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffe8800, 0x100), DEFINE_RES_MEM 280 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffe9000, 0x100), DEFINE_RES_MEM 304 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffe9800, 0x100), DEFINE_RES_MEM 328 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffea000, 0x100), DEFINE_RES_MEM 352 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffea800, 0x100), DEFINE_RES_MEM 376 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffeb000, 0x100), DEFINE_RES_MEM 400 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffeb800, 0x100), DEFINE_RES_MEM 422 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffec000, 0x10), DEFINE_RES_MEM 438 arch/sh/kernel/cpu/sh2a/setup-sh7264.c DEFINE_RES_MEM(0xfffe4000, 0x400), DEFINE_RES_MEM 254 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xe8007000, 0x100), DEFINE_RES_MEM 278 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xe8007800, 0x100), DEFINE_RES_MEM 302 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xe8008000, 0x100), DEFINE_RES_MEM 326 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xe8008800, 0x100), DEFINE_RES_MEM 350 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xe8009000, 0x100), DEFINE_RES_MEM 374 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xe8009800, 0x100), DEFINE_RES_MEM 398 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xe800a000, 0x100), DEFINE_RES_MEM 422 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xe800a800, 0x100), DEFINE_RES_MEM 444 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xfffec000, 0x10), DEFINE_RES_MEM 460 arch/sh/kernel/cpu/sh2a/setup-sh7269.c DEFINE_RES_MEM(0xfffe4000, 0x400), DEFINE_RES_MEM 77 arch/sh/kernel/cpu/sh3/setup-sh7705.c DEFINE_RES_MEM(0xa4410000, 0x100), DEFINE_RES_MEM 98 arch/sh/kernel/cpu/sh3/setup-sh7705.c DEFINE_RES_MEM(0xa4400000, 0x100), DEFINE_RES_MEM 143 arch/sh/kernel/cpu/sh3/setup-sh7705.c DEFINE_RES_MEM(0xfffffe90, 0x2c), DEFINE_RES_MEM 114 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_MEM(0xfffffe80, 0x10), DEFINE_RES_MEM 137 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_MEM(0xa4000150, 0x10), DEFINE_RES_MEM 159 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_MEM(0xa4000140, 0x10), DEFINE_RES_MEM 179 arch/sh/kernel/cpu/sh3/setup-sh770x.c DEFINE_RES_MEM(0xfffffe90, 0x2c), DEFINE_RES_MEM 103 arch/sh/kernel/cpu/sh3/setup-sh7710.c DEFINE_RES_MEM(0xa4400000, 0x100), DEFINE_RES_MEM 123 arch/sh/kernel/cpu/sh3/setup-sh7710.c DEFINE_RES_MEM(0xa4410000, 0x100), DEFINE_RES_MEM 142 arch/sh/kernel/cpu/sh3/setup-sh7710.c DEFINE_RES_MEM(0xa412fe90, 0x28), DEFINE_RES_MEM 58 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_MEM(0xa4430000, 0x100), DEFINE_RES_MEM 79 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_MEM(0xa4438000, 0x100), DEFINE_RES_MEM 153 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_MEM(0x044a0000, 0x60), DEFINE_RES_MEM 172 arch/sh/kernel/cpu/sh3/setup-sh7720.c DEFINE_RES_MEM(0xa412fe90, 0x28), DEFINE_RES_MEM 22 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_MEM(0xffe80000, 0x100), DEFINE_RES_MEM 44 arch/sh/kernel/cpu/sh4/setup-sh4-202.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 42 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_MEM(0xffe00000, 0x20), DEFINE_RES_MEM 62 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_MEM(0xffe80000, 0x100), DEFINE_RES_MEM 81 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 107 arch/sh/kernel/cpu/sh4/setup-sh7750.c DEFINE_RES_MEM(0xfe100000, 0x20), DEFINE_RES_MEM 134 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_MEM(0xfe600000, 0x100), DEFINE_RES_MEM 158 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_MEM(0xfe610000, 0x100), DEFINE_RES_MEM 182 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_MEM(0xfe620000, 0x100), DEFINE_RES_MEM 211 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_MEM(0xfe480000, 0x10), DEFINE_RES_MEM 232 arch/sh/kernel/cpu/sh4/setup-sh7760.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 23 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_MEM(0xffe00000, 0x100), DEFINE_RES_MEM 43 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_MEM(0xffe10000, 0x100), DEFINE_RES_MEM 63 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_MEM(0xffe20000, 0x100), DEFINE_RES_MEM 83 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_MEM(0xffe30000, 0x100), DEFINE_RES_MEM 228 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_MEM(0x044a0000, 0x70), DEFINE_RES_MEM 247 arch/sh/kernel/cpu/sh4a/setup-sh7343.c DEFINE_RES_MEM(0xffd80000, 0x2c), DEFINE_RES_MEM 25 arch/sh/kernel/cpu/sh4a/setup-sh7366.c DEFINE_RES_MEM(0xffe00000, 0x100), DEFINE_RES_MEM 178 arch/sh/kernel/cpu/sh4a/setup-sh7366.c DEFINE_RES_MEM(0x044a0000, 0x70), DEFINE_RES_MEM 197 arch/sh/kernel/cpu/sh4a/setup-sh7366.c DEFINE_RES_MEM(0xffd80000, 0x2c), DEFINE_RES_MEM 186 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_MEM(0xffe00000, 0x100), DEFINE_RES_MEM 208 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_MEM(0xffe10000, 0x100), DEFINE_RES_MEM 230 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_MEM(0xffe20000, 0x100), DEFINE_RES_MEM 414 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_MEM(0x044a0000, 0x70), DEFINE_RES_MEM 433 arch/sh/kernel/cpu/sh4a/setup-sh7722.c DEFINE_RES_MEM(0xffd80000, 0x2c), DEFINE_RES_MEM 29 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0xffe00000, 0x100), DEFINE_RES_MEM 50 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0xffe10000, 0x100), DEFINE_RES_MEM 71 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0xffe20000, 0x100), DEFINE_RES_MEM 91 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0xa4e30000, 0x100), DEFINE_RES_MEM 111 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0xa4e40000, 0x100), DEFINE_RES_MEM 131 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0xa4e50000, 0x100), DEFINE_RES_MEM 234 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0x044a0000, 0x70), DEFINE_RES_MEM 253 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0xffd80000, 0x2c), DEFINE_RES_MEM 274 arch/sh/kernel/cpu/sh4a/setup-sh7723.c DEFINE_RES_MEM(0xffd90000, 0x2c), DEFINE_RES_MEM 296 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0xffe00000, 0x100), DEFINE_RES_MEM 317 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0xffe10000, 0x100), DEFINE_RES_MEM 338 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0xffe20000, 0x100), DEFINE_RES_MEM 358 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0xa4e30000, 0x100), DEFINE_RES_MEM 378 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0xa4e40000, 0x100), DEFINE_RES_MEM 398 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0xa4e50000, 0x100), DEFINE_RES_MEM 637 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0x044a0000, 0x70), DEFINE_RES_MEM 656 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0xffd80000, 0x2c), DEFINE_RES_MEM 677 arch/sh/kernel/cpu/sh4a/setup-sh7724.c DEFINE_RES_MEM(0xffd90000, 0x2c), DEFINE_RES_MEM 31 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffe40000, 0x100), DEFINE_RES_MEM 52 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffe41000, 0x100), DEFINE_RES_MEM 73 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffe42000, 0x100), DEFINE_RES_MEM 94 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffe43000, 0x100), DEFINE_RES_MEM 115 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffe44000, 0x100), DEFINE_RES_MEM 136 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffe43000, 0x100), DEFINE_RES_MEM 198 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 219 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffd81000, 0x30), DEFINE_RES_MEM 240 arch/sh/kernel/cpu/sh4a/setup-sh7734.c DEFINE_RES_MEM(0xffd82000, 0x30), DEFINE_RES_MEM 29 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_MEM(0xfe4b0000, 0x100), /* SCIF2 */ DEFINE_RES_MEM 49 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_MEM(0xfe4c0000, 0x100), /* SCIF3 */ DEFINE_RES_MEM 69 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_MEM(0xfe4d0000, 0x100), /* SCIF4 */ DEFINE_RES_MEM 88 arch/sh/kernel/cpu/sh4a/setup-sh7757.c DEFINE_RES_MEM(0xfe430000, 0x20), DEFINE_RES_MEM 25 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_MEM(0xffe00000, 0x100), DEFINE_RES_MEM 46 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_MEM(0xffe08000, 0x100), DEFINE_RES_MEM 67 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_MEM(0xffe10000, 0x100), DEFINE_RES_MEM 159 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 180 arch/sh/kernel/cpu/sh4a/setup-sh7763.c DEFINE_RES_MEM(0xffd88000, 0x2c), DEFINE_RES_MEM 21 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff923000, 0x100), DEFINE_RES_MEM 41 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff924000, 0x100), DEFINE_RES_MEM 61 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff925000, 0x100), DEFINE_RES_MEM 81 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff926000, 0x100), DEFINE_RES_MEM 101 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff927000, 0x100), DEFINE_RES_MEM 121 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff928000, 0x100), DEFINE_RES_MEM 141 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff929000, 0x100), DEFINE_RES_MEM 161 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff92a000, 0x100), DEFINE_RES_MEM 181 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff92b000, 0x100), DEFINE_RES_MEM 201 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xff92c000, 0x100), DEFINE_RES_MEM 220 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 241 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xffd81000, 0x30), DEFINE_RES_MEM 262 arch/sh/kernel/cpu/sh4a/setup-sh7770.c DEFINE_RES_MEM(0xffd82000, 0x2c), DEFINE_RES_MEM 24 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_MEM(0xffe00000, 0x100), DEFINE_RES_MEM 45 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_MEM(0xffe10000, 0x100), DEFINE_RES_MEM 64 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 85 arch/sh/kernel/cpu/sh4a/setup-sh7780.c DEFINE_RES_MEM(0xffdc0000, 0x2c), DEFINE_RES_MEM 26 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_MEM(0xffea0000, 0x100), DEFINE_RES_MEM 47 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_MEM(0xffeb0000, 0x100), DEFINE_RES_MEM 68 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_MEM(0xffec0000, 0x100), DEFINE_RES_MEM 89 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_MEM(0xffed0000, 0x100), DEFINE_RES_MEM 110 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_MEM(0xffee0000, 0x100), DEFINE_RES_MEM 131 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_MEM(0xffef0000, 0x100), DEFINE_RES_MEM 150 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 171 arch/sh/kernel/cpu/sh4a/setup-sh7785.c DEFINE_RES_MEM(0xffdc0000, 0x2c), DEFINE_RES_MEM 34 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffea0000, 0x100), DEFINE_RES_MEM 61 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffeb0000, 0x100), DEFINE_RES_MEM 66 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffeb0000, 0x100), DEFINE_RES_MEM 91 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffec0000, 0x100), DEFINE_RES_MEM 112 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffed0000, 0x100), DEFINE_RES_MEM 133 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffee0000, 0x100), DEFINE_RES_MEM 154 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffef0000, 0x100), DEFINE_RES_MEM 173 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffd80000, 0x30), DEFINE_RES_MEM 194 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffda0000, 0x2c), DEFINE_RES_MEM 215 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffdc0000, 0x2c), DEFINE_RES_MEM 236 arch/sh/kernel/cpu/sh4a/setup-sh7786.c DEFINE_RES_MEM(0xffde0000, 0x2c), DEFINE_RES_MEM 33 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_MEM(0xffc30000, 0x100), DEFINE_RES_MEM 56 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_MEM(0xffc40000, 0x100), DEFINE_RES_MEM 79 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_MEM(0xffc60000, 0x100), DEFINE_RES_MEM 101 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_MEM(0xffc10000, 0x30), DEFINE_RES_MEM 122 arch/sh/kernel/cpu/sh4a/setup-shx3.c DEFINE_RES_MEM(0xffc20000, 0x2c), DEFINE_RES_MEM 23 arch/sh/kernel/cpu/sh5/setup-sh5.c DEFINE_RES_MEM(PHYS_PERIPHERAL_BLOCK + 0x01030000, 0x100), DEFINE_RES_MEM 77 arch/sh/kernel/cpu/sh5/setup-sh5.c DEFINE_RES_MEM(TMU_BASE, 0x30), DEFINE_RES_MEM 555 arch/x86/kernel/early-quirks.c struct resource intel_graphics_stolen_res __ro_after_init = DEFINE_RES_MEM(0, 0); DEFINE_RES_MEM 339 drivers/acpi/arm64/gtdt.c DEFINE_RES_MEM(wd->control_frame_address, SZ_4K), DEFINE_RES_MEM 340 drivers/acpi/arm64/gtdt.c DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K), DEFINE_RES_MEM 82 drivers/acpi/pci_mcfg.c DEFINE_RES_MEM((addr) + ((u64) (node) << 44), 0x39 * SZ_16M) DEFINE_RES_MEM 95 drivers/gpu/drm/i915/gem/i915_gem_stolen.c (struct resource) DEFINE_RES_MEM(ggtt_start, DEFINE_RES_MEM 448 drivers/gpu/drm/i915/gem/i915_gem_stolen.c (struct resource) DEFINE_RES_MEM(reserved_base, reserved_size); DEFINE_RES_MEM 2991 drivers/gpu/drm/i915/i915_gem_gtt.c (struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2), DEFINE_RES_MEM 3048 drivers/gpu/drm/i915/i915_gem_gtt.c (struct resource) DEFINE_RES_MEM(pci_resource_start(pdev, 2), DEFINE_RES_MEM 3118 drivers/gpu/drm/i915/i915_gem_gtt.c (struct resource) DEFINE_RES_MEM(gmadr_base, DEFINE_RES_MEM 105 drivers/gpu/drm/i915/selftests/mock_gtt.c ggtt->gmadr = (struct resource) DEFINE_RES_MEM(0, 2048 * PAGE_SIZE); DEFINE_RES_MEM 95 drivers/mfd/intel-lpss.c DEFINE_RES_MEM(LPSS_IDMA64_OFFSET, LPSS_IDMA64_SIZE), DEFINE_RES_MEM 29 drivers/mfd/mt6397-core.c DEFINE_RES_MEM(MT6323_RTC_BASE, MT6323_RTC_SIZE), DEFINE_RES_MEM 34 drivers/mfd/mt6397-core.c DEFINE_RES_MEM(MT6397_RTC_BASE, MT6397_RTC_SIZE), DEFINE_RES_MEM 49 drivers/mfd/mt6397-core.c DEFINE_RES_MEM(MT6323_PWRC_BASE, MT6323_PWRC_SIZE), DEFINE_RES_MEM 56 drivers/mfd/mxs-lradc.c DEFINE_RES_MEM(0x0, 0x0), DEFINE_RES_MEM 66 drivers/mfd/mxs-lradc.c DEFINE_RES_MEM(0x0, 0x0), DEFINE_RES_MEM 73 drivers/mfd/mxs-lradc.c DEFINE_RES_MEM(0x0, 0x0), DEFINE_RES_MEM 87 drivers/mfd/mxs-lradc.c DEFINE_RES_MEM(0x0, 0x0), DEFINE_RES_MEM 63 drivers/mfd/sun6i-prcm.c DEFINE_RES_MEM(SUN8I_CODEC_ANALOG_BASE, SUN8I_CODEC_ANALOG_SIZE), DEFINE_RES_MEM 100 drivers/mfd/vexpress-sysreg.c DEFINE_RES_MEM(SYS_ID, 0x4), DEFINE_RES_MEM 135 drivers/mfd/vexpress-sysreg.c DEFINE_RES_MEM(SYS_MISC, 0x4), DEFINE_RES_MEM 143 drivers/mfd/vexpress-sysreg.c DEFINE_RES_MEM(SYS_PROCID0, 0x8), DEFINE_RES_MEM 151 drivers/mfd/vexpress-sysreg.c DEFINE_RES_MEM(SYS_CFGDATA, 0xc), DEFINE_RES_MEM 252 drivers/net/ethernet/8390/xsurf100.c DEFINE_RES_MEM(zdev->resource.start + XS100_8390_BASE, DEFINE_RES_MEM 9 drivers/staging/board/kzm9d.c DEFINE_RES_MEM(0xe2800000, 0x2000), DEFINE_RES_MEM 183 include/linux/amba/bus.h .res = DEFINE_RES_MEM(base, SZ_4K), \ DEFINE_RES_MEM 194 include/linux/amba/bus.h .res = DEFINE_RES_MEM(base, SZ_4K), \