DEC_CPU_IRQ_NR    179 arch/mips/dec/setup.c 	[DEC_IRQ_DZ11]		= DEC_CPU_IRQ_NR(KN01_CPU_INR_DZ11),
DEC_CPU_IRQ_NR    182 arch/mips/dec/setup.c 	[DEC_IRQ_FPU]		= DEC_CPU_IRQ_NR(DEC_CPU_INR_FPU),
DEC_CPU_IRQ_NR    185 arch/mips/dec/setup.c 	[DEC_IRQ_LANCE]		= DEC_CPU_IRQ_NR(KN01_CPU_INR_LANCE),
DEC_CPU_IRQ_NR    186 arch/mips/dec/setup.c 	[DEC_IRQ_BUS]		= DEC_CPU_IRQ_NR(KN01_CPU_INR_BUS),
DEC_CPU_IRQ_NR    188 arch/mips/dec/setup.c 	[DEC_IRQ_RTC]		= DEC_CPU_IRQ_NR(KN01_CPU_INR_RTC),
DEC_CPU_IRQ_NR    191 arch/mips/dec/setup.c 	[DEC_IRQ_SII]		= DEC_CPU_IRQ_NR(KN01_CPU_INR_SII),
DEC_CPU_IRQ_NR    196 arch/mips/dec/setup.c 	[DEC_IRQ_VIDEO]		= DEC_CPU_IRQ_NR(KN01_CPU_INR_VIDEO),
DEC_CPU_IRQ_NR    221 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN01_CPU_INR_BUS) } },
DEC_CPU_IRQ_NR    223 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN01_CPU_INR_RTC) } },
DEC_CPU_IRQ_NR    225 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN01_CPU_INR_DZ11) } },
DEC_CPU_IRQ_NR    227 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN01_CPU_INR_SII) } },
DEC_CPU_IRQ_NR    229 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN01_CPU_INR_LANCE) } },
DEC_CPU_IRQ_NR    256 arch/mips/dec/setup.c 	[DEC_IRQ_DZ11]		= DEC_CPU_IRQ_NR(KN230_CPU_INR_DZ11),
DEC_CPU_IRQ_NR    259 arch/mips/dec/setup.c 	[DEC_IRQ_FPU]		= DEC_CPU_IRQ_NR(DEC_CPU_INR_FPU),
DEC_CPU_IRQ_NR    260 arch/mips/dec/setup.c 	[DEC_IRQ_HALT]		= DEC_CPU_IRQ_NR(KN230_CPU_INR_HALT),
DEC_CPU_IRQ_NR    262 arch/mips/dec/setup.c 	[DEC_IRQ_LANCE]		= DEC_CPU_IRQ_NR(KN230_CPU_INR_LANCE),
DEC_CPU_IRQ_NR    263 arch/mips/dec/setup.c 	[DEC_IRQ_BUS]		= DEC_CPU_IRQ_NR(KN230_CPU_INR_BUS),
DEC_CPU_IRQ_NR    265 arch/mips/dec/setup.c 	[DEC_IRQ_RTC]		= DEC_CPU_IRQ_NR(KN230_CPU_INR_RTC),
DEC_CPU_IRQ_NR    268 arch/mips/dec/setup.c 	[DEC_IRQ_SII]		= DEC_CPU_IRQ_NR(KN230_CPU_INR_SII),
DEC_CPU_IRQ_NR    298 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN230_CPU_INR_BUS) } },
DEC_CPU_IRQ_NR    300 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN230_CPU_INR_RTC) } },
DEC_CPU_IRQ_NR    302 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN230_CPU_INR_DZ11) } },
DEC_CPU_IRQ_NR    304 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN230_CPU_INR_SII) } },
DEC_CPU_IRQ_NR    328 arch/mips/dec/setup.c 	[DEC_IRQ_CASCADE]	= DEC_CPU_IRQ_NR(KN02_CPU_INR_CASCADE),
DEC_CPU_IRQ_NR    334 arch/mips/dec/setup.c 	[DEC_IRQ_FPU]		= DEC_CPU_IRQ_NR(DEC_CPU_INR_FPU),
DEC_CPU_IRQ_NR    338 arch/mips/dec/setup.c 	[DEC_IRQ_BUS]		= DEC_CPU_IRQ_NR(KN02_CPU_INR_BUS),
DEC_CPU_IRQ_NR    340 arch/mips/dec/setup.c 	[DEC_IRQ_RTC]		= DEC_CPU_IRQ_NR(KN02_CPU_INR_RTC),
DEC_CPU_IRQ_NR    373 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN02_CPU_INR_BUS) } },
DEC_CPU_IRQ_NR    375 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN02_CPU_INR_RTC) } },
DEC_CPU_IRQ_NR    425 arch/mips/dec/setup.c 	[DEC_IRQ_CASCADE]	= DEC_CPU_IRQ_NR(KN02BA_CPU_INR_CASCADE),
DEC_CPU_IRQ_NR    431 arch/mips/dec/setup.c 	[DEC_IRQ_FPU]		= DEC_CPU_IRQ_NR(DEC_CPU_INR_FPU),
DEC_CPU_IRQ_NR    432 arch/mips/dec/setup.c 	[DEC_IRQ_HALT]		= DEC_CPU_IRQ_NR(KN02BA_CPU_INR_HALT),
DEC_CPU_IRQ_NR    441 arch/mips/dec/setup.c 	[DEC_IRQ_TC0]		= DEC_CPU_IRQ_NR(KN02BA_CPU_INR_TC0),
DEC_CPU_IRQ_NR    442 arch/mips/dec/setup.c 	[DEC_IRQ_TC1]		= DEC_CPU_IRQ_NR(KN02BA_CPU_INR_TC1),
DEC_CPU_IRQ_NR    443 arch/mips/dec/setup.c 	[DEC_IRQ_TC2]		= DEC_CPU_IRQ_NR(KN02BA_CPU_INR_TC2),
DEC_CPU_IRQ_NR    472 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN02BA_CPU_INR_TC2) } },
DEC_CPU_IRQ_NR    474 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN02BA_CPU_INR_TC1) } },
DEC_CPU_IRQ_NR    476 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN02BA_CPU_INR_TC0) } },
DEC_CPU_IRQ_NR    526 arch/mips/dec/setup.c 	[DEC_IRQ_CASCADE]	= DEC_CPU_IRQ_NR(KN02CA_CPU_INR_CASCADE),
DEC_CPU_IRQ_NR    532 arch/mips/dec/setup.c 	[DEC_IRQ_FPU]		= DEC_CPU_IRQ_NR(DEC_CPU_INR_FPU),
DEC_CPU_IRQ_NR    533 arch/mips/dec/setup.c 	[DEC_IRQ_HALT]		= DEC_CPU_IRQ_NR(KN02CA_CPU_INR_HALT),
DEC_CPU_IRQ_NR    536 arch/mips/dec/setup.c 	[DEC_IRQ_BUS]		= DEC_CPU_IRQ_NR(KN02CA_CPU_INR_BUS),
DEC_CPU_IRQ_NR    538 arch/mips/dec/setup.c 	[DEC_IRQ_RTC]		= DEC_CPU_IRQ_NR(KN02CA_CPU_INR_RTC),
DEC_CPU_IRQ_NR    545 arch/mips/dec/setup.c 	[DEC_IRQ_TIMER]		= DEC_CPU_IRQ_NR(KN02CA_CPU_INR_TIMER),
DEC_CPU_IRQ_NR    571 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN02CA_CPU_INR_BUS) } },
DEC_CPU_IRQ_NR    573 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN02CA_CPU_INR_RTC) } },
DEC_CPU_IRQ_NR    623 arch/mips/dec/setup.c 	[DEC_IRQ_CASCADE]	= DEC_CPU_IRQ_NR(KN03_CPU_INR_CASCADE),
DEC_CPU_IRQ_NR    629 arch/mips/dec/setup.c 	[DEC_IRQ_FPU]		= DEC_CPU_IRQ_NR(DEC_CPU_INR_FPU),
DEC_CPU_IRQ_NR    630 arch/mips/dec/setup.c 	[DEC_IRQ_HALT]		= DEC_CPU_IRQ_NR(KN03_CPU_INR_HALT),
DEC_CPU_IRQ_NR    633 arch/mips/dec/setup.c 	[DEC_IRQ_BUS]		= DEC_CPU_IRQ_NR(KN03_CPU_INR_BUS),
DEC_CPU_IRQ_NR    635 arch/mips/dec/setup.c 	[DEC_IRQ_RTC]		= DEC_CPU_IRQ_NR(KN03_CPU_INR_RTC),
DEC_CPU_IRQ_NR    668 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN03_CPU_INR_BUS) } },
DEC_CPU_IRQ_NR    670 arch/mips/dec/setup.c 		{ .i = DEC_CPU_IRQ_NR(KN03_CPU_INR_RTC) } },