DDI_BUF_CTL 482 drivers/gpu/drm/i915/display/icl_dsi.c tmp = I915_READ(DDI_BUF_CTL(port)); DDI_BUF_CTL 484 drivers/gpu/drm/i915/display/icl_dsi.c I915_WRITE(DDI_BUF_CTL(port), tmp); DDI_BUF_CTL 486 drivers/gpu/drm/i915/display/icl_dsi.c if (wait_for_us(!(I915_READ(DDI_BUF_CTL(port)) & DDI_BUF_CTL 1149 drivers/gpu/drm/i915/display/icl_dsi.c tmp = I915_READ(DDI_BUF_CTL(port)); DDI_BUF_CTL 1151 drivers/gpu/drm/i915/display/icl_dsi.c I915_WRITE(DDI_BUF_CTL(port), tmp); DDI_BUF_CTL 1153 drivers/gpu/drm/i915/display/icl_dsi.c if (wait_for_us((I915_READ(DDI_BUF_CTL(port)) & DDI_BUF_CTL 987 drivers/gpu/drm/i915/display/intel_ddi.c i915_reg_t reg = DDI_BUF_CTL(port); DDI_BUF_CTL 1120 drivers/gpu/drm/i915/display/intel_ddi.c I915_WRITE(DDI_BUF_CTL(PORT_E), DDI_BUF_CTL 1124 drivers/gpu/drm/i915/display/intel_ddi.c POSTING_READ(DDI_BUF_CTL(PORT_E)); DDI_BUF_CTL 1167 drivers/gpu/drm/i915/display/intel_ddi.c temp = I915_READ(DDI_BUF_CTL(PORT_E)); DDI_BUF_CTL 1169 drivers/gpu/drm/i915/display/intel_ddi.c I915_WRITE(DDI_BUF_CTL(PORT_E), temp); DDI_BUF_CTL 1170 drivers/gpu/drm/i915/display/intel_ddi.c POSTING_READ(DDI_BUF_CTL(PORT_E)); DDI_BUF_CTL 1988 drivers/gpu/drm/i915/display/intel_ddi.c tmp = I915_READ(DDI_BUF_CTL(port)); DDI_BUF_CTL 3330 drivers/gpu/drm/i915/display/intel_ddi.c val = I915_READ(DDI_BUF_CTL(port)); DDI_BUF_CTL 3333 drivers/gpu/drm/i915/display/intel_ddi.c I915_WRITE(DDI_BUF_CTL(port), val); DDI_BUF_CTL 3563 drivers/gpu/drm/i915/display/intel_ddi.c I915_WRITE(DDI_BUF_CTL(port), DDI_BUF_CTL 3769 drivers/gpu/drm/i915/display/intel_ddi.c val = I915_READ(DDI_BUF_CTL(port)); DDI_BUF_CTL 3772 drivers/gpu/drm/i915/display/intel_ddi.c I915_WRITE(DDI_BUF_CTL(port), val); DDI_BUF_CTL 3799 drivers/gpu/drm/i915/display/intel_ddi.c I915_WRITE(DDI_BUF_CTL(port), intel_dp->DP); DDI_BUF_CTL 3800 drivers/gpu/drm/i915/display/intel_ddi.c POSTING_READ(DDI_BUF_CTL(port)); DDI_BUF_CTL 4033 drivers/gpu/drm/i915/display/intel_ddi.c intel_dig_port->dp.output_reg = DDI_BUF_CTL(port); DDI_BUF_CTL 4209 drivers/gpu/drm/i915/display/intel_ddi.c intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port); DDI_BUF_CTL 4254 drivers/gpu/drm/i915/display/intel_ddi.c if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) DDI_BUF_CTL 4339 drivers/gpu/drm/i915/display/intel_ddi.c intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & DDI_BUF_CTL 4342 drivers/gpu/drm/i915/display/intel_ddi.c intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & DDI_BUF_CTL 15270 drivers/gpu/drm/i915/display/intel_display.c if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES) DDI_BUF_CTL 15374 drivers/gpu/drm/i915/display/intel_display.c found = I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED; DDI_BUF_CTL 259 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) |= DDI_BUF_CTL_ENABLE; DDI_BUF_CTL 260 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_B)) &= ~DDI_BUF_IS_IDLE; DDI_BUF_CTL 285 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) |= DDI_BUF_CTL_ENABLE; DDI_BUF_CTL 286 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_C)) &= ~DDI_BUF_IS_IDLE; DDI_BUF_CTL 311 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) |= DDI_BUF_CTL_ENABLE; DDI_BUF_CTL 312 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_D)) &= ~DDI_BUF_IS_IDLE; DDI_BUF_CTL 329 drivers/gpu/drm/i915/gvt/display.c vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_A)) |= DDI_INIT_DISPLAY_DETECTED; DDI_BUF_CTL 545 drivers/gpu/drm/i915/gvt/handlers.c if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E))) DDI_BUF_CTL 564 drivers/gpu/drm/i915/gvt/handlers.c u32 ddi_buf_ctl = vgpu_vreg_t(vgpu, DDI_BUF_CTL(PORT_E)); DDI_BUF_CTL 2447 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(DDI_BUF_CTL(PORT_A), D_ALL, NULL, ddi_buf_ctl_mmio_write); DDI_BUF_CTL 2448 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(DDI_BUF_CTL(PORT_B), D_ALL, NULL, ddi_buf_ctl_mmio_write); DDI_BUF_CTL 2449 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(DDI_BUF_CTL(PORT_C), D_ALL, NULL, ddi_buf_ctl_mmio_write); DDI_BUF_CTL 2450 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(DDI_BUF_CTL(PORT_D), D_ALL, NULL, ddi_buf_ctl_mmio_write); DDI_BUF_CTL 2451 drivers/gpu/drm/i915/gvt/handlers.c MMIO_DH(DDI_BUF_CTL(PORT_E), D_ALL, NULL, ddi_buf_ctl_mmio_write);