DC__VOLTAGE_STATES  348 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int PrefetchMode[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  396 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double DCFCLKPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  397 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double FabricClockPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  398 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double SOCCLKPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  399 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double PHYCLKPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  400 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double DTBCLKPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  401 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double MaxDppclk[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  402 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double MaxDSCCLK[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  403 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double DRAMSpeedPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  404 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double MaxDispclk[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  415 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool BandwidthSupport[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  419 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool IsErrorResult[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  427 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	enum dm_validation_status ValidationStatus[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  490 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double IdealSDPPortBandwidthPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  491 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int NoOfDPP[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  493 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool ODMCombineEnablePerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  494 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	enum odm_combine_mode ODMCombineTypeEnablePerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  496 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int SwathHeightCPerState[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  499 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double VRatioPreY[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  500 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double VRatioPreC[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  501 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double RequiredPrefetchPixelDataBWLuma[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  502 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double RequiredPrefetchPixelDataBWChroma[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  503 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double RequiredDPPCLK[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  505 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool PTEBufferSizeNotExceededY[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  506 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool PTEBufferSizeNotExceededC[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  507 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool BandwidthWithoutPrefetchSupported[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  508 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool PrefetchSupported[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  509 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool VRatioInPrefetchSupported[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  510 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double RequiredDISPCLK[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  511 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool DISPCLK_DPPCLK_Support[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  512 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool TotalAvailablePipesSupport[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  513 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int TotalNumberOfActiveDPP[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  514 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int TotalNumberOfDCCActiveDPP[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  515 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool ModeSupport[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  516 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double ReturnBWPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  517 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool DIOSupport[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  518 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool NotEnoughDSCUnits[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  519 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool DSCCLKRequiredMoreThanSupported[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  520 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool DTBCLKRequiredMoreThanSupported[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  521 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double UrgentRoundTripAndOutOfOrderLatencyPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  522 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool ROBSupport[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  523 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool PTEBufferSizeNotExceeded[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  524 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool TotalVerticalActiveBandwidthSupport[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  525 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double MaxTotalVerticalActiveAvailableBandwidth[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  543 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool RequiresDSC[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  544 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int NumberOfDSCSlice[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  545 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double RequiresFEC[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  546 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double OutputBppPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  547 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double DSCDelayPerState[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  548 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool ViewportSizeSupport[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  577 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool ImmediateFlipSupportedForState[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  578 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double WritebackDelay[DC__VOLTAGE_STATES + 1][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  598 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	enum clock_change_support DRAMClockChangeSupport[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  606 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool           MPCCombine[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  643 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int   TotalNumberOfSingleDPPPlanes[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  645 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool           ODMCombine4To1SupportCheckOK[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  789 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double UrgentLatencySupportUsPerState[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  791 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double FabricAndDRAMBandwidthPerState[DC__VOLTAGE_STATES + 1];
DC__VOLTAGE_STATES  792 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	bool UrgentLatencySupport[DC__VOLTAGE_STATES + 1][2];
DC__VOLTAGE_STATES  793 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int SwathWidthYPerState[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  794 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	unsigned int SwathHeightYPerState[DC__VOLTAGE_STATES + 1][2][DC__NUM_DPP__MAX];
DC__VOLTAGE_STATES  842 drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.h 	double PHYCLKD18PerState[DC__VOLTAGE_STATES + 1];