DC_LOG_DSC        360 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 	DC_LOG_DSC("\tbytes_per_pixel 0x%08x (%d.%07d)",
DC_LOG_DSC        362 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 	DC_LOG_DSC("\tis_pixel_format_444 %d", config->is_pixel_format_444);
DC_LOG_DSC        363 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 	DC_LOG_DSC("\tslice_width %d", config->slice_width);
DC_LOG_DSC        422 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 			DC_LOG_DSC("Setting stream encoder DSC config for engine %d:", (int)pipe_ctx->stream_res.stream_enc->id);
DC_LOG_DSC        433 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst);
DC_LOG_DSC        506 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 		DC_LOG_DSC(" ");
DC_LOG_DSC        509 drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c 			DC_LOG_DSC("Setting stream encoder DSC PPS SDP for engine %d\n", (int)pipe_ctx->stream_res.stream_enc->id);
DC_LOG_DSC        178 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tnum_slices_h %d", config->dc_dsc_cfg.num_slices_h);
DC_LOG_DSC        179 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tnum_slices_v %d", config->dc_dsc_cfg.num_slices_v);
DC_LOG_DSC        180 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tbits_per_pixel %d (%d.%04d)",
DC_LOG_DSC        184 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tcolor_depth %d", config->color_depth);
DC_LOG_DSC        193 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC(" ");
DC_LOG_DSC        194 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("Setting DSC Config at DSC inst %d", dsc->inst);
DC_LOG_DSC        198 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("programming DSC Picture Parameter Set (PPS):");
DC_LOG_DSC        210 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("Getting packed DSC PPS for DSC Config:");
DC_LOG_DSC        212 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("DSC Picture Parameter Set (PPS):");
DC_LOG_DSC        227 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("enable DSC at opp pipe %d", opp_pipe);
DC_LOG_DSC        242 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("disable DSC");
DC_LOG_DSC        258 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tdsc_version_major %d", pps->dsc_version_major);
DC_LOG_DSC        259 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tdsc_version_minor %d", pps->dsc_version_minor);
DC_LOG_DSC        260 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tbits_per_component %d", pps->bits_per_component);
DC_LOG_DSC        261 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tline_buf_depth %d", pps->line_buf_depth);
DC_LOG_DSC        262 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tblock_pred_enable %d", pps->block_pred_enable);
DC_LOG_DSC        263 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tconvert_rgb %d", pps->convert_rgb);
DC_LOG_DSC        264 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tsimple_422 %d", pps->simple_422);
DC_LOG_DSC        265 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tvbr_enable %d", pps->vbr_enable);
DC_LOG_DSC        266 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tbits_per_pixel %d (%d.%04d)", bits_per_pixel, bits_per_pixel / 16, ((bits_per_pixel % 16) * 10000) / 16);
DC_LOG_DSC        267 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tpic_height %d", pps->pic_height);
DC_LOG_DSC        268 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tpic_width %d", pps->pic_width);
DC_LOG_DSC        269 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tslice_height %d", pps->slice_height);
DC_LOG_DSC        270 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tslice_width %d", pps->slice_width);
DC_LOG_DSC        271 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tslice_chunk_size %d", pps->slice_chunk_size);
DC_LOG_DSC        272 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tinitial_xmit_delay %d", pps->initial_xmit_delay);
DC_LOG_DSC        273 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tinitial_dec_delay %d", pps->initial_dec_delay);
DC_LOG_DSC        274 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tinitial_scale_value %d", pps->initial_scale_value);
DC_LOG_DSC        275 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tscale_increment_interval %d", pps->scale_increment_interval);
DC_LOG_DSC        276 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tscale_decrement_interval %d", pps->scale_decrement_interval);
DC_LOG_DSC        277 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tfirst_line_bpg_offset %d", pps->first_line_bpg_offset);
DC_LOG_DSC        278 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tnfl_bpg_offset %d", pps->nfl_bpg_offset);
DC_LOG_DSC        279 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tslice_bpg_offset %d", pps->slice_bpg_offset);
DC_LOG_DSC        280 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tinitial_offset %d", pps->initial_offset);
DC_LOG_DSC        281 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tfinal_offset %d", pps->final_offset);
DC_LOG_DSC        282 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tflatness_min_qp %d", pps->flatness_min_qp);
DC_LOG_DSC        283 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tflatness_max_qp %d", pps->flatness_max_qp);
DC_LOG_DSC        285 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tnative_420 %d", pps->native_420);
DC_LOG_DSC        286 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tnative_422 %d", pps->native_422);
DC_LOG_DSC        287 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tsecond_line_bpg_offset %d", pps->second_line_bpg_offset);
DC_LOG_DSC        288 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tnsl_bpg_offset %d", pps->nsl_bpg_offset);
DC_LOG_DSC        289 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\tsecond_line_offset_adj %d", pps->second_line_offset_adj);
DC_LOG_DSC        290 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\trc_model_size %d", pps->rc_model_size);
DC_LOG_DSC        291 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\trc_edge_factor %d", pps->rc_edge_factor);
DC_LOG_DSC        292 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\trc_quant_incr_limit0 %d", pps->rc_quant_incr_limit0);
DC_LOG_DSC        293 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\trc_quant_incr_limit1 %d", pps->rc_quant_incr_limit1);
DC_LOG_DSC        294 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\trc_tgt_offset_high %d", pps->rc_tgt_offset_high);
DC_LOG_DSC        295 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 	DC_LOG_DSC("\trc_tgt_offset_low %d", pps->rc_tgt_offset_low);
DC_LOG_DSC        298 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		DC_LOG_DSC("\trc_buf_thresh[%d] %d", i, pps->rc_buf_thresh[i]);
DC_LOG_DSC        301 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		DC_LOG_DSC("\trc_range_parameters[%d].range_min_qp %d", i, pps->rc_range_params[i].range_min_qp);
DC_LOG_DSC        302 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		DC_LOG_DSC("\trc_range_parameters[%d].range_max_qp %d", i, pps->rc_range_params[i].range_max_qp);
DC_LOG_DSC        303 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c 		DC_LOG_DSC("\trc_range_parameters[%d].range_bpg_offset %d", i, pps->rc_range_params[i].range_bpg_offset);
DC_LOG_DSC        172 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.c 	DC_LOG_DSC("%s FEC at link encoder inst %d",