DC_IRQ_SOURCE_HPD1 434 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c for (src = DC_IRQ_SOURCE_HPD1; src <= DC_IRQ_SOURCE_HPD6RX; src++) { DC_IRQ_SOURCE_HPD1 487 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c for (src = DC_IRQ_SOURCE_HPD1; src <= DC_IRQ_SOURCE_HPD6; src++) { DC_IRQ_SOURCE_HPD1 586 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c return DC_IRQ_SOURCE_HPD1; DC_IRQ_SOURCE_HPD1 1072 drivers/gpu/drm/amd/display/dc/core/dc_link.c case DC_IRQ_SOURCE_HPD1: DC_IRQ_SOURCE_HPD1 384 drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c return (enum dc_irq_source)(DC_IRQ_SOURCE_HPD1 + DC_IRQ_SOURCE_HPD1 92 drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c [DC_IRQ_SOURCE_HPD1 + reg_num] = {\ DC_IRQ_SOURCE_HPD1 369 drivers/gpu/drm/amd/display/dc/irq/dce110/irq_service_dce110.c return DC_IRQ_SOURCE_HPD1; DC_IRQ_SOURCE_HPD1 120 drivers/gpu/drm/amd/display/dc/irq/dce120/irq_service_dce120.c [DC_IRQ_SOURCE_HPD1 + reg_num] = {\ DC_IRQ_SOURCE_HPD1 90 drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c return DC_IRQ_SOURCE_HPD1; DC_IRQ_SOURCE_HPD1 201 drivers/gpu/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c [DC_IRQ_SOURCE_HPD1 + reg_num] = {\ DC_IRQ_SOURCE_HPD1 90 drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c return DC_IRQ_SOURCE_HPD1; DC_IRQ_SOURCE_HPD1 205 drivers/gpu/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c [DC_IRQ_SOURCE_HPD1 + reg_num] = {\ DC_IRQ_SOURCE_HPD1 90 drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c return DC_IRQ_SOURCE_HPD1; DC_IRQ_SOURCE_HPD1 201 drivers/gpu/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c [DC_IRQ_SOURCE_HPD1 + reg_num] = {\