DC_HPD5_INT_CONTROL 6932 drivers/gpu/drm/radeon/cik.c 	tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
DC_HPD5_INT_CONTROL 6933 drivers/gpu/drm/radeon/cik.c 	WREG32(DC_HPD5_INT_CONTROL, tmp);
DC_HPD5_INT_CONTROL 7060 drivers/gpu/drm/radeon/cik.c 	hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN);
DC_HPD5_INT_CONTROL 7282 drivers/gpu/drm/radeon/cik.c 	WREG32(DC_HPD5_INT_CONTROL, hpd5);
DC_HPD5_INT_CONTROL 7399 drivers/gpu/drm/radeon/cik.c 		tmp = RREG32(DC_HPD5_INT_CONTROL);
DC_HPD5_INT_CONTROL 7401 drivers/gpu/drm/radeon/cik.c 		WREG32(DC_HPD5_INT_CONTROL, tmp);
DC_HPD5_INT_CONTROL 7429 drivers/gpu/drm/radeon/cik.c 		tmp = RREG32(DC_HPD5_INT_CONTROL);
DC_HPD5_INT_CONTROL 7431 drivers/gpu/drm/radeon/cik.c 		WREG32(DC_HPD5_INT_CONTROL, tmp);
DC_HPD5_INT_CONTROL  900 drivers/gpu/drm/radeon/r600.c 			tmp = RREG32(DC_HPD5_INT_CONTROL);
DC_HPD5_INT_CONTROL  905 drivers/gpu/drm/radeon/r600.c 			WREG32(DC_HPD5_INT_CONTROL, tmp);
DC_HPD5_INT_CONTROL 3644 drivers/gpu/drm/radeon/r600.c 			tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY;
DC_HPD5_INT_CONTROL 3645 drivers/gpu/drm/radeon/r600.c 			WREG32(DC_HPD5_INT_CONTROL, tmp);
DC_HPD5_INT_CONTROL 3792 drivers/gpu/drm/radeon/r600.c 			hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN;
DC_HPD5_INT_CONTROL 3888 drivers/gpu/drm/radeon/r600.c 			WREG32(DC_HPD5_INT_CONTROL, hpd5);
DC_HPD5_INT_CONTROL 3992 drivers/gpu/drm/radeon/r600.c 			tmp = RREG32(DC_HPD5_INT_CONTROL);
DC_HPD5_INT_CONTROL 3994 drivers/gpu/drm/radeon/r600.c 			WREG32(DC_HPD5_INT_CONTROL, tmp);